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[209.132.180.67]) by mx.google.com with ESMTP id u77si1739393pfd.165.2018.02.15.06.08.13; Thu, 15 Feb 2018 06:08:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=BrrwrXHd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1033070AbeBOOHE (ORCPT + 99 others); Thu, 15 Feb 2018 09:07:04 -0500 Received: from mail-wm0-f68.google.com ([74.125.82.68]:36072 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1032953AbeBOOHC (ORCPT ); Thu, 15 Feb 2018 09:07:02 -0500 Received: by mail-wm0-f68.google.com with SMTP id f3so1076473wmc.1; Thu, 15 Feb 2018 06:07:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=8UIWmT2szUB7m9EYYgGCSjXea59jE1E/zzPTAxtf9Rs=; b=BrrwrXHdTT7B+UIlzr3Fj55H42U3qcTxBzmegmuvKPyfHUYZjn51eyjsw/oEO905ea cHTL7slpFNxqH7VLoFj3pm4GWf3NUHh7fB3oEQbFM4/vaiqpZnvNJsphM8ghKcVkFzF8 w98+ojD3O2koXJ6Bz9Ekl2s6s60tdBWCKpdVXSyy7SNpS3Gq+6OHQsWSFt70wJvjTbTq 1yJQJqBPvrSlYepfdcuafkZB5j5xaqePCrcBYqRSGPZBivUEtvtEkztZ5coBH/jO1CAh grwEaq+o5gLXaHIeXNAjKVLJk2d/kdjEfcYd7esAfnyddL0d2wU5X/wTmqsMUdkqtMgI X5kQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=8UIWmT2szUB7m9EYYgGCSjXea59jE1E/zzPTAxtf9Rs=; b=kz4Tm32RaK4IZbgWWh9iPaXoOajVv9SkyeaGCltKeqQocpXYQUZFx49z/p0ervCQmi leFKDHpKzX9l1K9TSFwsK4KSrAqkq+oiyf/V7/sfLthxSZ4MaHdUpX7CnSIrujHL9Ekg KjS/ErTYqA9wH/BzXjot7Iksv0PlM1zvytghupoFydMz1f0olaH+0JG35pbtR7gk3YC7 ZQqkx6Rf2LDLPN+B76h+YKUXxkKm3wfejGdA6s7Xv8elRT8pu0Yl1EmJxKRQS5k1f2aT eodgE+iJ6jj3u6v83mv9TLDwH79wuyPjO7UeN1cRw4I33EQCj2zf1S5RKHjctLdCSuZ6 UPdw== X-Gm-Message-State: APf1xPDG/ZxnrluNz42iB3Z+6WKkvPOTZb0qWlfwLwUGu0AUGZW4Rcna XvBH0s+Tt64F9PfgB5fDJRJSo/GNiRiFnCsiHgc= X-Received: by 10.28.130.72 with SMTP id e69mr2395732wmd.50.1518703620666; Thu, 15 Feb 2018 06:07:00 -0800 (PST) MIME-Version: 1.0 Received: by 10.223.174.172 with HTTP; Thu, 15 Feb 2018 06:06:40 -0800 (PST) In-Reply-To: <20180214135612.21356-1-embed3d@gmail.com> References: <20180214135612.21356-1-embed3d@gmail.com> From: Julian Calaby Date: Fri, 16 Feb 2018 01:06:40 +1100 Message-ID: Subject: Re: [linux-sunxi] [PATCH v3] rtc: ac100: Fix ac100 determine rate bug To: embed3d@gmail.com Cc: Chen-Yu Tsai , a.zummo@towertech.it, alexandre.belloni@bootlin.com, Maxime Ripard , "linux-kernel@vger.kernel.org" , linux-sunxi , linux-rtc@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Phillipp, On Thu, Feb 15, 2018 at 12:56 AM, Philipp Rossak wrote: > This patch fixes a bug, that prevents the Allwinner A83T and the A80 > from a successful boot. > > The bug is there since v4.16-rc1 and appeared after the clk branch was > merged. > > You can find the shortend trace below: > > Unable to handle kernel NULL pointer dereference at virtual address > 00000000 > pgd = (ptrval) > [00000000] *pgd=00000000 > Internal error: Oops: 5 [#1] SMP ARM > Modules linked in: > CPU: 0 PID: 49 Comm: kworker/0:1 Not tainted 4.15.0-10190-gb89e32ccd1be #2 > Hardware name: Allwinner sun8i Family > Workqueue: events deferred_probe_work_func > PC is at clk_hw_get_rate+0x0/0x34 > LR is at ac100_clkout_determine_rate+0x48/0x19c > > [ ... ] > > (clk_hw_get_rate) from (ac100_clkout_determine_rate+0x48/0x19c) > (ac100_clkout_determine_rate) from (clk_core_set_rate_nolock+0x3c/0x1a0) > (clk_core_set_rate_nolock) from (clk_set_rate+0x30/0x88) > (clk_set_rate) from (of_clk_set_defaults+0x200/0x364) > (of_clk_set_defaults) from (platform_drv_probe+0x18/0xb0) > > To fix that bug, we first check if the return of the > clk_hw_get_parent_by_index is non zero. If it is zero we skip that > clock parent. > > The BUG report could be found here: https://lkml.org/lkml/2018/2/10/198 > > Fixes: 04940631b8d2 ("rtc: ac100: Add clk output support") > > Signed-off-by: Philipp Rossak > --- > > Changes in v3: > * add information when the bug appeared > * make the comment more clear > Changes in v2: > * add tag Fixes: ... to commit message > * add comment to if statement why we are doing this check > > drivers/rtc/rtc-ac100.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/rtc/rtc-ac100.c b/drivers/rtc/rtc-ac100.c > index 8ff9dc3fe5bf..2412aa2e8399 100644 > --- a/drivers/rtc/rtc-ac100.c > +++ b/drivers/rtc/rtc-ac100.c > @@ -183,7 +183,24 @@ static int ac100_clkout_determine_rate(struct clk_hw *hw, > > for (i = 0; i < num_parents; i++) { > struct clk_hw *parent = clk_hw_get_parent_by_index(hw, i); > - unsigned long tmp, prate = clk_hw_get_rate(parent); > + unsigned long tmp, prate; > + > + /* > + * The clock has two parents, one is a fixed clock which is > + * internally registered by the ac100 driver. The other parent > + * is a clock from the codec side of the chip, which we > + * properly declare and reference in the devicetree and is > + * not implemented in any driver right now. > + * If the clock core looks for the parent of that second > + * missing clock, it can't one that is registered and You've missed the word "find" between "it can't" and "one that is registered". Thanks, -- Julian Calaby Email: julian.calaby@gmail.com Profile: http://www.google.com/profiles/julian.calaby/