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[209.132.180.67]) by mx.google.com with ESMTP id a66si1306704pgc.221.2018.02.15.06.11.08; Thu, 15 Feb 2018 06:11:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=GdY6DDi5; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1033057AbeBOOK1 (ORCPT + 99 others); Thu, 15 Feb 2018 09:10:27 -0500 Received: from galahad.ideasonboard.com ([185.26.127.97]:48541 "EHLO galahad.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1032283AbeBOOKY (ORCPT ); Thu, 15 Feb 2018 09:10:24 -0500 Received: from avalon.localnet (dfj612ybrt5fhg77mgycy-3.rev.dnainternet.fi [IPv6:2001:14ba:21f5:5b00:2e86:4862:ef6a:2804]) by galahad.ideasonboard.com (Postfix) with ESMTPSA id 48E20200BF; Thu, 15 Feb 2018 15:08:50 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1518703730; bh=KCrK4kZTelA75NFBfhDOBtdh4Ms9tntzuCGZtUTIKCY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GdY6DDi5PR51hgJyXk/wmsznZwRoLxNZduoKLfCowfuVoiq7FfyEhJwSUhgsh5vbc Bk9lIp7gWj2Up++/q1LPM4ur0QbNt80U1gJ+bSeZ2+g0BwMdWBFwAo/kWftXlRp446 0d8HUyKNurUk19xIc+TFnOsyCpUxzGzoP0c76ODw= From: Laurent Pinchart To: Kieran Bingham Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kieran Bingham , Simon Horman , geert@glider.be, Kieran Bingham , Magnus Damm , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , open list Subject: Re: [PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support Date: Thu, 15 Feb 2018 16:10:58 +0200 Message-ID: <1558036.KTdDODi8F6@avalon> Organization: Ideas on Board Oy In-Reply-To: <1518683903-10681-6-git-send-email-kbingham@kernel.org> References: <1518683903-10681-1-git-send-email-kbingham@kernel.org> <1518683903-10681-6-git-send-email-kbingham@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Kieran, Thank you for the patch. On Thursday, 15 February 2018 10:38:20 EET Kieran Bingham wrote: > From: Kieran Bingham > > The r8a77995 D3 platform has 2 LVDS channels connected to the DU. > > Signed-off-by: Kieran Bingham > --- > arch/arm64/boot/dts/renesas/r8a77995.dtsi | 52 ++++++++++++++++++++++++++++ > 1 file changed, 52 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi > b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index > a57d5fecf79c..7851e37cfff1 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi > @@ -773,18 +773,70 @@ > port@1 { > reg = <1>; > du_out_lvds0: endpoint { > + remote-endpoint = <&du_out_lvds0>; > }; > }; > > port@2 { > reg = <2>; > du_out_lvds1: endpoint { > + remote-endpoint = <&du_out_lvds1>; It's interesting how the DU ports reference themselves :-) > }; > }; > }; > }; > }; > > + lvds0: lvds@feb90000 { > + compatible = "renesas,lvds-r8a77995"; > + reg = <0 0xfeb90000 0 0x20>; > + clocks = <&cpg CPG_MOD 727>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + lvds0_in: endpoint { > + remote-endpoint = <&du_out_lvds0>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + lvds0_out: endpoint { > + }; > + }; > + }; > + }; > + > + lvds1: lvds@feb90100 { > + compatible = "renesas,lvds-r8a77995"; > + reg = <0 0xfeb90100 0 0x20>; > + clocks = <&cpg CPG_MOD 727>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + lvds1_in: endpoint { > + remote-endpoint = <&du_out_lvds1>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + lvds1_out: endpoint { > + }; > + }; > + }; > + }; > + > timer { > compatible = "arm,armv8-timer"; > interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | > IRQ_TYPE_LEVEL_LOW)>, -- Regards, Laurent Pinchart