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[209.132.180.67]) by mx.google.com with ESMTP id i194si2863158pgd.511.2018.02.15.06.32.16; Thu, 15 Feb 2018 06:32:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=DuKRg8vT; dkim=pass header.i=@codeaurora.org header.s=default header.b=oEOMEZG/; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1033256AbeBOOb2 (ORCPT + 99 others); Thu, 15 Feb 2018 09:31:28 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:40590 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1033100AbeBOObY (ORCPT ); Thu, 15 Feb 2018 09:31:24 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 93A1560F6E; Thu, 15 Feb 2018 14:31:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1518705083; bh=lWqW7bCJiyo8PbgZGGyALjlZiS4Kbk6pLACqTiiIEg8=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=DuKRg8vTWJ4ZMIhsSslCmFXv/vT9NtMQzYmC3EctwnauMFZ93iic6sOald1fs69jn PVH9OJJaJOPSqZgrXxivCS7IYjl4UWq1xcyZvlfJtLxK3iT6tkSy9r69+YP8cxrK7l L0gkiFkKlLr2ZVLwlC+sYQ9GRri/8YxRLA31aTm4= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from [10.201.3.39] (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sricharan@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7D45F60B67; Thu, 15 Feb 2018 14:31:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1518705078; bh=lWqW7bCJiyo8PbgZGGyALjlZiS4Kbk6pLACqTiiIEg8=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=oEOMEZG/J7XU9ejo5eCxZD4pi+DOEmzD14P9CfBblMV4XNevlVcyb1mXl3EYFLiK5 6BqiN+fO2DUmZwXa1K/Nlo0E8npROjlqmEobYrJwZF96RqcESdSjic1ZORYDbjtWWD 5p9k1CsNbMSiojRRIP1JFVe6XBHwv+QhTaueoJJw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7D45F60B67 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sricharan@codeaurora.org Subject: Re: [PATCH 04/12] i2c: qup: schedule EOT and FLUSH tags at the end of transfer To: Abhishek Sahu , Andy Gross , Wolfram Sang Cc: David Brown , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org References: <1517644697-30806-1-git-send-email-absahu@codeaurora.org> <1517644697-30806-5-git-send-email-absahu@codeaurora.org> From: Sricharan R Message-ID: Date: Thu, 15 Feb 2018 20:01:04 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <1517644697-30806-5-git-send-email-absahu@codeaurora.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Abhishek, On 2/3/2018 1:28 PM, Abhishek Sahu wrote: > A single BAM transfer can have multiple read and write messages. > The EOT and FLUSH tags should be scheduled at the end of BAM HW > descriptors. Since the READ and WRITE can be present in any order > so for some of the cases, these tags are not being written > correctly. > > Signed-off-by: Abhishek Sahu > --- > drivers/i2c/busses/i2c-qup.c | 54 ++++++++++++++++++++------------------------ > 1 file changed, 24 insertions(+), 30 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c > index bb83a2967..6357aff 100644 > --- a/drivers/i2c/busses/i2c-qup.c > +++ b/drivers/i2c/busses/i2c-qup.c > @@ -560,7 +560,7 @@ static int qup_i2c_set_tags_smb(u16 addr, u8 *tags, struct qup_i2c_dev *qup, > } > > static int qup_i2c_set_tags(u8 *tags, struct qup_i2c_dev *qup, > - struct i2c_msg *msg, int is_dma) > + struct i2c_msg *msg) > { > u16 addr = i2c_8bit_addr_from_msg(msg); > int len = 0; > @@ -601,11 +601,6 @@ static int qup_i2c_set_tags(u8 *tags, struct qup_i2c_dev *qup, > else > tags[len++] = data_len; > > - if ((msg->flags & I2C_M_RD) && last && is_dma) { > - tags[len++] = QUP_BAM_INPUT_EOT; > - tags[len++] = QUP_BAM_FLUSH_STOP; > - } > - > return len; > } > > @@ -614,7 +609,7 @@ static int qup_i2c_issue_xfer_v2(struct qup_i2c_dev *qup, struct i2c_msg *msg) > int data_len = 0, tag_len, index; > int ret; > > - tag_len = qup_i2c_set_tags(qup->blk.tags, qup, msg, 0); > + tag_len = qup_i2c_set_tags(qup->blk.tags, qup, msg); > index = msg->len - qup->blk.data_len; > > /* only tags are written for read */ > @@ -710,7 +705,7 @@ static int qup_i2c_bam_do_xfer(struct qup_i2c_dev *qup, struct i2c_msg *msg, > while (qup->blk.pos < blocks) { > tlen = (i == (blocks - 1)) ? rem : limit; > tags = &qup->start_tag.start[off + len]; > - len += qup_i2c_set_tags(tags, qup, msg, 1); > + len += qup_i2c_set_tags(tags, qup, msg); > qup->blk.data_len -= tlen; > > /* scratch buf to read the start and len tags */ > @@ -738,17 +733,11 @@ static int qup_i2c_bam_do_xfer(struct qup_i2c_dev *qup, struct i2c_msg *msg, > return ret; > > off += len; > - /* scratch buf to read the BAM EOT and FLUSH tags */ > - ret = qup_sg_set_buf(&qup->brx.sg[rx_buf++], > - &qup->brx.tag.start[0], > - 2, qup, DMA_FROM_DEVICE); > - if (ret) > - return ret; > } else { > while (qup->blk.pos < blocks) { > tlen = (i == (blocks - 1)) ? rem : limit; > tags = &qup->start_tag.start[off + tx_len]; > - len = qup_i2c_set_tags(tags, qup, msg, 1); > + len = qup_i2c_set_tags(tags, qup, msg); > qup->blk.data_len -= tlen; > > ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++], > @@ -768,26 +757,31 @@ static int qup_i2c_bam_do_xfer(struct qup_i2c_dev *qup, struct i2c_msg *msg, > } > off += tx_len; > > - if (idx == (num - 1)) { > - len = 1; > - if (rx_buf) { > - qup->btx.tag.start[0] = > - QUP_BAM_INPUT_EOT; > - len++; > - } > - qup->btx.tag.start[len - 1] = > - QUP_BAM_FLUSH_STOP; > - ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++], > - &qup->btx.tag.start[0], > - len, qup, DMA_TO_DEVICE); > - if (ret) > - return ret; > - } > } > idx++; > msg++; > } While here, can you please split above the if, else in to two separate functions ? and probably one more function for handling the NACK case down below. The function size at the moment is too big. > > + /* schedule the EOT and FLUSH I2C tags */ > + len = 1; > + if (rx_buf) { > + qup->btx.tag.start[0] = QUP_BAM_INPUT_EOT; > + len++; > + > + /* scratch buf to read the BAM EOT and FLUSH tags */ > + ret = qup_sg_set_buf(&qup->brx.sg[rx_buf++], > + &qup->brx.tag.start[0], > + 2, qup, DMA_FROM_DEVICE); > + if (ret) > + return ret; > + } > + > + qup->btx.tag.start[len - 1] = QUP_BAM_FLUSH_STOP; > + ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++], &qup->btx.tag.start[0], > + len, qup, DMA_TO_DEVICE); > + if (ret) > + return ret; > + May be you can change the commit to make it explicit to say what is being fixed, like "current code is broken when there is sequence of wr,rd,wr" like that. Agree on this fix otherwise. Regards, Sricharan -- "QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation