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[209.132.180.67]) by mx.google.com with ESMTP id b5-v6si4746958ple.457.2018.02.16.11.19.14; Fri, 16 Feb 2018 11:19:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=pvHA/mLE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161276AbeBPQsN (ORCPT + 99 others); Fri, 16 Feb 2018 11:48:13 -0500 Received: from mail-wr0-f193.google.com ([209.85.128.193]:45277 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161140AbeBPQr1 (ORCPT ); Fri, 16 Feb 2018 11:47:27 -0500 Received: by mail-wr0-f193.google.com with SMTP id p104so2183295wrc.12 for ; Fri, 16 Feb 2018 08:47:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zM368nRnMe/Lz9m09GcalYH0rsiP03CwsXqN7Y9yBD8=; b=pvHA/mLETeOPf0X5vYtxeLAJ0r7brO6VfhHOp3Qe2EQe7mZ6K+nK70HkWrmr4SdsXi goO8i3kMcIboy9q/JlYnbMBDwLlypLK7yj12gPRn/RP13SzqUICY4lb2e8d3PzrRCXY5 gn8XppxjSJIHVdQ8wNA0T586CJpImCymKDG3YM45mCk3Q8e3AazJ8VoLqgJKkfbq/362 8zLgNbg8wwHLyYm8sDdHOV9IEgFpfmSg5VmpEIDv14r+CMpVzQoFXW/LmuVp3dTICxpG xU1l5IyoWC1s9FJsRl8Df1nFL1ISs6R8nrbFsMk5yh69a9gbQVqGJcqN9+7/DeF/+qJ/ LHEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zM368nRnMe/Lz9m09GcalYH0rsiP03CwsXqN7Y9yBD8=; b=jO3jVJagB8lAVvLD4PO5YnaTJI0EPQXq33QLgxug7zzNsYm303WgZ/lcmdYfVmS3mB pmNrB2lMLKxU+fRiohwnskmb6kY91iZiXsWYX/OD1sMOumEDG4WQYX2NllnH7BPzMbvp 6dHAR6+8BWM07GsGsbpkUDOxYvxzgWzyRPU6oOYyDTOCEMKmlW525knvAhIPES4q9QFc gvBQnus6tjCq9A5HzyvGYe7mCm4QudP5IDxXZGA6YULhE+nCHPyIyeV75i4+JP5qONTl i6RR06LNK8K0OW83cIFcn/L3DRel+giOlAwes+YnxNc2SQCQC9uw09gOrggW7u4BQqyP 5rkg== X-Gm-Message-State: APf1xPCKykXGMogfcGz0wRKLk388N+bRLIkgTYKi6e7zHnT4jiM/oRO0 Vb0OjPdO8ktn+xkHPwcW27i9xw== X-Received: by 10.223.162.203 with SMTP id t11mr1619698wra.88.1518799645686; Fri, 16 Feb 2018 08:47:25 -0800 (PST) Received: from brgl-bgdev.baylibre.local ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id 90sm7832826wrp.2.2018.02.16.08.47.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Feb 2018 08:47:25 -0800 (PST) From: Bartosz Golaszewski To: Sekhar Nori , Kevin Hilman , Russell King , Santosh Shilimkar , Boris Brezillon , Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Cyrille Pitchen Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, David Lechner , Bartosz Golaszewski Subject: [PATCH 5/6] ARM: davinci: add aemif & nand support to da850-lcdk in legacy mode Date: Fri, 16 Feb 2018 17:47:11 +0100 Message-Id: <20180216164712.25898-6-brgl@bgdev.pl> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180216164712.25898-1-brgl@bgdev.pl> References: <20180216164712.25898-1-brgl@bgdev.pl> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski We now have support for aemif & nand from board files. As an example add support for nand to da850-lcdk in legacy mode. Signed-off-by: Bartosz Golaszewski --- arch/arm/mach-davinci/board-omapl138-hawk.c | 132 ++++++++++++++++++++++++++++ 1 file changed, 132 insertions(+) diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index a3e78074be70..6a4f2c1d460d 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -16,6 +16,11 @@ #include #include #include +#include +#include +#include +#include +#include #include #include @@ -162,6 +167,129 @@ static __init void omapl138_hawk_mmc_init(void) gpiod_remove_lookup_table(&mmc_gpios_table); } +static struct mtd_partition omapl138_hawk_nandflash_partition[] = { + { + .name = "u-boot env", + .offset = 0, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "u-boot", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "free space", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0, + }, +}; + +static struct davinci_aemif_timing omapl138_hawk_nandflash_timing = { + .wsetup = 24, + .wstrobe = 21, + .whold = 14, + .rsetup = 19, + .rstrobe = 50, + .rhold = 0, + .ta = 20, +}; + +static struct davinci_nand_pdata omapl138_hawk_nandflash_data = { + .parts = omapl138_hawk_nandflash_partition, + .nr_parts = ARRAY_SIZE(omapl138_hawk_nandflash_partition), + .ecc_mode = NAND_ECC_HW, + .ecc_bits = 4, + .bbt_options = NAND_BBT_USE_FLASH, + .options = NAND_BUSWIDTH_16, + .timing = &omapl138_hawk_nandflash_timing, + .mask_chipsel = 0, + .mask_ale = 0, + .mask_cle = 0, +}; + +static struct resource omapl138_hawk_nandflash_resource[] = { + { + .start = DA8XX_AEMIF_CS3_BASE, + .end = DA8XX_AEMIF_CS3_BASE + SZ_32M, + .flags = IORESOURCE_MEM, + }, + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K, + .flags = IORESOURCE_MEM, + }, +}; + +static struct resource omapl138_hawk_aemif_resource[] = { + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K, + .flags = IORESOURCE_MEM, + } +}; + +static struct aemif_abus_data omapl138_hawk_aemif_abus_data[] = { + { + .cs = 3, + } +}; + +static struct platform_device omapl138_hawk_aemif_devices[] = { + { + .name = "davinci-nand", + .id = 1, + .dev = { + .platform_data = &omapl138_hawk_nandflash_data, + }, + .resource = omapl138_hawk_nandflash_resource, + .num_resources = ARRAY_SIZE(omapl138_hawk_nandflash_resource), + .id = 0, + } +}; + +static struct aemif_platform_data omapl138_hawk_aemif_pdata = { + .cs_offset = 2, + .abus_data = omapl138_hawk_aemif_abus_data, + .num_abus_data = ARRAY_SIZE(omapl138_hawk_aemif_abus_data), + .sub_devices = omapl138_hawk_aemif_devices, + .num_sub_devices = ARRAY_SIZE(omapl138_hawk_aemif_devices), +}; + +static struct platform_device omapl138_hawk_aemif_device = { + .name = "ti-aemif", + .dev = { + .platform_data = &omapl138_hawk_aemif_pdata, + }, + .resource = omapl138_hawk_aemif_resource, + .num_resources = ARRAY_SIZE(omapl138_hawk_aemif_resource), + .id = -1, +}; + +static const short omapl138_hawk_nand_pins[] = { + DA850_EMA_WAIT_1, DA850_NEMA_OE, DA850_NEMA_WE, DA850_NEMA_CS_3, + DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, + DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, + DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11, + DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15, + DA850_EMA_A_1, DA850_EMA_A_2, + -1 +}; + +static int omapl138_hawk_register_aemif(void) +{ + int ret; + + ret = davinci_cfg_reg_list(omapl138_hawk_nand_pins); + if (ret) + pr_warn("%s: NAND mux setup failed: %d\n", __func__, ret); + + return platform_device_register(&omapl138_hawk_aemif_device); +} + static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id); static da8xx_ocic_handler_t hawk_usb_ocic_handler; @@ -301,6 +429,10 @@ static __init void omapl138_hawk_init(void) omapl138_hawk_usb_init(); + ret = omapl138_hawk_register_aemif(); + if (ret) + pr_warn("%s: aemif registration failed: %d\n", __func__, ret); + ret = da8xx_register_watchdog(); if (ret) pr_warn("%s: watchdog registration failed: %d\n", -- 2.16.1