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[209.132.180.67]) by mx.google.com with ESMTP id l71si835488pgd.501.2018.02.16.11.39.02; Fri, 16 Feb 2018 11:39:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=e7M7ogQR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751130AbeBPTiY (ORCPT + 99 others); Fri, 16 Feb 2018 14:38:24 -0500 Received: from mail-io0-f174.google.com ([209.85.223.174]:42736 "EHLO mail-io0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751035AbeBPTiU (ORCPT ); Fri, 16 Feb 2018 14:38:20 -0500 Received: by mail-io0-f174.google.com with SMTP id u84so5243631iod.9 for ; Fri, 16 Feb 2018 11:38:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=qzRyTAaKL8PIagGaiujErUrKlts5ErHnYCehjhoU2aw=; b=e7M7ogQRdl/fT+mqEY9amumFlTPDM2x9YadMy1LQJAKUlAJQ7n9Ol73clSWgHZ/HhQ c9QyFuLI8v0ZJkEfrCyf1T6fGU/VTF/PVEdUUwpsuqafUHmwWgCO+cdi4BfNGZcxuXi8 e4D1KOhD17tbDdoWTuvnZvV4wutQZ90N3Qj7UQA7a2o7Npkve+E/WhDMKsEcCnStZ9bP M3T0Qwee3QTAzFR/k6HbCostm+SoUpOXmaHnMqe1bpEO+ezIaMPlxxqYC7AYGv/3YRib CidnW9Yy5Y43QCfquHoAnfA2HaPkPBhc3bEqG+tzM3dlu5ufBM/jBsZ2TF1Vn0OT3yyQ uQ3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=qzRyTAaKL8PIagGaiujErUrKlts5ErHnYCehjhoU2aw=; b=X7Pl3kJbWsh7uH+i8DxZouWOWRRoPuJ4hhE3u7G88yh++dq4NBnJsJalibv8XtSRhk L0nT9AADdJsDZqgrhizaS1+XEalv2pA16QFAXZZWNILaCiJLrm4B24pn4TQkeAtyikTi PjAH4/BCR/d0TM6AWANOaJ77IMDnHkzDazAKiFhx7wjHuMDDaqB5PoCOaW7CaD6fvSVg GOx1U4VSLaC5sCMy1O7wQXuY6foU6Ds/REw7OkKTuLrPVz2P2bm8DkM6dQdodo+sxGiG 7aGckwQP1jaS8GoFlHhVWsrJNcjC1Vh7gxpUVHrDt+waVsma6dEPpevE89PDsg8APR2U wZ6Q== X-Gm-Message-State: APf1xPDIgNepW9p0CM2ZBo9sm5U64vfb1M3H25VQrSroCEXw+HRAORFa QkyvN6SarJnM1nDMz4AAfQqR8Ul6Tx3kT3S155wV1A== X-Received: by 10.107.154.137 with SMTP id c131mr10220105ioe.203.1518809899944; Fri, 16 Feb 2018 11:38:19 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.135.221 with HTTP; Fri, 16 Feb 2018 11:38:19 -0800 (PST) In-Reply-To: <20180216191755.6F62DDEA@viggo.jf.intel.com> References: <20180216191755.6F62DDEA@viggo.jf.intel.com> From: Linus Torvalds Date: Fri, 16 Feb 2018 11:38:19 -0800 X-Google-Sender-Auth: UEoThBX8IE0NAEEM3kgt4Ej19os Message-ID: Subject: Re: [RFC][PATCH] x86: proposed new ARCH_CAPABILITIES MSR bit for RSB-underflow To: Dave Hansen Cc: Linux Kernel Mailing List , Thomas Gleixner , One Thousand Gnomes , Rik van Riel , Josh Poimboeuf , Tom Lendacky , Peter Zijlstra , Jiri Kosina , Andy Lutomirski , Kees Cook , Greg Kroah-Hartman , Paul Turner , David Woodhouse , "the arch/x86 maintainers" , Andi Kleen , Tim Chen , Arjan van de Ven , Dan Williams , "Mallick, Asit K" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Feb 16, 2018 at 11:17 AM, Dave Hansen wrote: > > Intel is considering adding a new bit to the IA32_ARCH_CAPABILITIES > MSR to tell when RSB underflow might be happen. Feedback on this > would be greatly appreciated before the specification is finalized. Yes, please. It would be lovely to not have any "this model" kind of checks. Of course, your patch still doesn't allow for "we claim to be skylake for various other independent reasons, but the RSB issue is fixed". So it might actually be even better with _two_ bits: "explicitly needs RSB stuffing" and "explicitly fixed and does _not_ need RSB stuffing". And then if neither bit it set, we fall back to the implicit "we know Skylake needs it". If both bits are set, we just go with a "CPU is batshit schitzo" message, and assume it needs RSB stuffing just because it's obviously broken. Linus