Received: by 10.223.185.116 with SMTP id b49csp1123414wrg; Fri, 16 Feb 2018 12:56:15 -0800 (PST) X-Google-Smtp-Source: AH8x227YlLaP7l0Uwgh6SvdBy2mF+eUJibS+dDc89fDw4oyHisHLd0dNPnIrHmWs4EZjZc/Cy1B8 X-Received: by 10.98.2.6 with SMTP id 6mr7167497pfc.237.1518814575447; Fri, 16 Feb 2018 12:56:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518814575; cv=none; d=google.com; s=arc-20160816; b=YT9pU9oaWl1kcsT0y+qs450AHqoRiO0rEz7eGFJpTY6m123LnaGifWgqXD+5CNn9Z/ jGMReaFfNurTBI8lw9NkmZ1u4dY/gcwjjvrX+BFYb/RokD2kehJuDi0So3yrxbZS9Q4g L2isXGFSh8g+FQK5sTcSbl1tBMgTRkUlKNLa7gtMaORkTc+IlVPShkhFdwn7Kn+JrHPO HOn20xK8BpupEMBQeuFSdU7sHc3xa44fwjFjHVszhwL2mQrCaCHtLtJYJdqvevAByGsU z4aqymJv3kGY1Eo1UPrkU92CySDcP3EsWpzajfWVlQXMjzxlwBjBvAXfKclfkny+06E3 V0+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature:dkim-signature :arc-authentication-results; bh=FNWDbzVWaGcnpm9vMqmzwCuXcvWoBTcquf2MBs0kXxI=; b=bQiceLjH6aUOJZ4SMUUY7OvieXSf89oWHB13g5Xhz6b6HUjnk2ngElCbBf9990yxOC 13NB+hegu7Ba+sJ1btgkgzrpUJAGS0MZTUab+JdCIvM12Fu7f/d89yx9LQbp7gOBJ7jA t9aWw12NZ3fHyIE/hd4yUYItHUNPIi+rUNTLbHEI4MdrplYwSQ+tTetEZod1lEQjYs9U Pdz3Zlq26KKHQqaIHiT4rWEhFTnzd4u1wt7MEyz/ScCOewrc8vAvT97Ub4pRUjVPbl31 fv9OwGSTG1thzEZ7yESpfNtny0I7GuDbLshjTFYxT9peuqCXETn75hOrBZjrkFKNnVVF QQ7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@google.com header.s=20161025 header.b=XVhcD3c9; dkim=fail header.i=@chromium.org header.s=google header.b=XI9YW81A; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=chromium.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id az2-v6si85529plb.370.2018.02.16.12.56.00; Fri, 16 Feb 2018 12:56:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@google.com header.s=20161025 header.b=XVhcD3c9; dkim=fail header.i=@chromium.org header.s=google header.b=XI9YW81A; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750838AbeBPUys (ORCPT + 99 others); Fri, 16 Feb 2018 15:54:48 -0500 Received: from mail-vk0-f51.google.com ([209.85.213.51]:33300 "EHLO mail-vk0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750723AbeBPUyq (ORCPT ); Fri, 16 Feb 2018 15:54:46 -0500 Received: by mail-vk0-f51.google.com with SMTP id w201so2584315vkw.0 for ; Fri, 16 Feb 2018 12:54:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=FNWDbzVWaGcnpm9vMqmzwCuXcvWoBTcquf2MBs0kXxI=; b=XVhcD3c9k5PtkQMG84iP4A3SFKlqf9zSnNzxl5+owDtXv8+LYipd0OEKoOu5FlSgPL 1gY1nFtrOBIJXpHXcQdjK0tngT5POK0zX4YeB/KmrkuRn602yXKlhanj40a2Nfk3maPO lfOxT6Uiq9RtQwd/fPG5GJqDGPE8y0DinOmgx/WGI00N/n2t8HPfHkErGBEB2+paSrGF GGE9FfoXnVuBGbJQfkmRSb4FJpm6Kx37lV5UMC0ADQq4fhZZPyx3Zqhu9VR/5glWK2Sk syRrJ1n4hzaNjBaCTx7TePX6l4RriDVkvI03JcJFHQcDmcLQAzSHEaGZ5kiu/+PDwgED nQWQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=FNWDbzVWaGcnpm9vMqmzwCuXcvWoBTcquf2MBs0kXxI=; b=XI9YW81Ap76ASfXM4FqLsCPu1Lqho4lSJboB8s6cpM8n4BD7maXL65dJ1czLTU7ngc JgzxhtMMx2IA+EtZOMKzdHxf3Zj3/O5JXsxxwnDHKJjsN+EuRqy3EbhTcvo+VAkbddW2 YW2BuFbaDk9xzf65zE/PuZqfpxqdtO92kCR+Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=FNWDbzVWaGcnpm9vMqmzwCuXcvWoBTcquf2MBs0kXxI=; b=mckNfbIM5lM67rnqj271gYh2586ztRE2hLPZhdatVmLSNNVMz7DVAH4kHKPAZjqBsF DTDE8IH2ATlqNkO2fCI2anz3W+Q1yr79SUF1Gy3kr8h9nXIojHSYqz5Co8EIPR4HpBHM 2XtY0xKK7KJWlG0W18TUoGqJMm0nhkNUr3b6evkEYAJoEXuS7LfOjY0ksrOfR5gdkJav 5a0yACXWBkPN9/mNnYPmzKj6qPYnpUTcNC5QJHMpWTtWPXdK4gqyfe0lEeIxe/3m/+Em enU9964y8Rw5dHnxImVYzuOOtFKE+JD5DNKHvU2mo9P/TSkh6M5F5iacPdbZZRD7eO9I HR4w== X-Gm-Message-State: APf1xPAVXhOYhrhj+kBLwcX0vXyzQh6XY82nszaFwlfcRn+mxkZ2MUvV dVJ5nlXEBWL8iDp4/7xrQY1qwO0ajHn4ZkGbikKAYA== X-Received: by 10.31.160.136 with SMTP id j130mr5535697vke.139.1518814485313; Fri, 16 Feb 2018 12:54:45 -0800 (PST) MIME-Version: 1.0 Received: by 10.31.49.19 with HTTP; Fri, 16 Feb 2018 12:54:44 -0800 (PST) In-Reply-To: References: <20180130202913.28724-1-thierry.escande@collabora.com> <20180130202913.28724-34-thierry.escande@collabora.com> <1517403243.14302.1.camel@pengutronix.de> From: Doug Anderson Date: Fri, 16 Feb 2018 12:54:44 -0800 X-Google-Sender-Auth: PA6DQPsaDCVRdfb1ymI966yVgbQ Message-ID: Subject: Re: [PATCH v3 33/43] drm/panel: simple: Change mode for Sharp lq123p1jx31 To: Enric Balletbo Serra Cc: Sean Paul , Haixia Shi , Thierry Escande , Lin Huang , David Airlie , Linux Kernel Mailing List , dri-devel , Tomasz Figa , "open list:ARM/Rockchip SoC..." , Thierry Reding , Yakir Yang , Enric Balletbo i Serra , =?UTF-8?Q?=C3=98rjan_Eide?= , Mark Yao , Zain Wang Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Fri, Feb 16, 2018 at 4:34 AM, Enric Balletbo Serra wrote: > Hi, > > 2018-01-31 17:52 GMT+01:00 Doug Anderson : >> Hi, >> >> >> On Wed, Jan 31, 2018 at 7:16 AM, Sean Paul wrote: >>> On Wed, Jan 31, 2018 at 7:54 AM, Lucas Stach wrote: >>>> Am Dienstag, den 30.01.2018, 21:29 +0100 schrieb Thierry Escande: >>>>> From: Sean Paul >>>>> >>>>> Change the mode for Sharp lq123p1jx31 panel to something more >>>>> rockchip-friendly such that we can use the fixed PLLs to >>>>> generate the pixel clock >>>> >>>> This should really switch to a display timing instead of exposing a >>>> single mode. The display timing has min, typical, max tuples for all >>>> the timings values, which would allow the attached driver to vary the >>>> timings inside the allowed bounds if it makes sense. >>>> >>>> Trying to hit a specific pixel clock to free up a PLL is exactly one of >>>> the use cases envisioned for the display timings stuff. >>>> >>> >>> Agreed, I think we had this discussion the first time around. We >>> should drop this patch. >>> >>> Thanks for catching this! >> >> Are you sure we should drop this? In order for things to work >> properly (not generate noise on the digitizer or other EMI), this >> needs to run at a very specific pixel clock with very specific >> blanking times. I know that earlier we had slightly different >> blanking times and Samsung came back and said that there was noise on >> the digitizer. I could be wrong, but I don't think there's any way >> currently to be able to specify exactly what timings should be used on >> a particular board. >> >> Don't get be wrong--I think a patch such as this one that claims a >> single board's timings as the "right" ones for a generic panel is a >> bit of a hack. ...but at the same time there are no other users of >> this panel (that I know of) in mainline and the timings presented here >> are certainly sane timings for this panel. >> >> In any case, previous discussion at: https://patchwork.kernel.org/patch/9614603/ >> >> >> ...oh, and looking at the previous discussion reminds me that the >> timings presented in this here patch are actually not the right ones >> (they have the right PLL, but the wrong blankings to avoid the noise >> issues). See >> > > As Thierry no longer has the hardware to test these patch series, I'll > take care of these and follow the upstreaming process. I think that > doesn't make sense send a v4 version of all 43 patches for this > change. Right now, only this patch received comments so I'll wait a > bit more for if we can get the other patches reviewed. If the others > are fine just and I don't need to send a new version just don't apply > this one and I will send a second version of that specific patch. Or > even better, is really trivial what needs to be changed, so maybe the > maintainer can do it? ;) Just as a heads up, Sean Paul has a series of patches to replace this patch. The following are IDs from patchwork.kernel.org: 10207583 New [v3,1/6] dt-bindings: Clarify timing subnode use as panel-timing 10207585 New [v3,2/6] dt-bindings: Add headings to simple-panel bindings 10207591 New [v3,3/6] dt-bindings: Add panel-timing subnode to simple-panel 10207593 New [v3,4/6] drm/panel: simple: Add ability to override typical timing 10207595 New [v3,5/6] drm/panel: simple: Use display_timing for lq123p1jx31 10207603 New [v3,6/6] arm64: dts: rockchip: Specify override mode for kevin panel -Doug