Received: by 10.223.185.116 with SMTP id b49csp2088300wrg; Sat, 17 Feb 2018 11:58:41 -0800 (PST) X-Google-Smtp-Source: AH8x224GW2UmXiVF8mW248Xf3oZV1K0PN6ooxM0x7f86VKfzUqT+aH4Br+287Y+SsbIZn93BW83e X-Received: by 2002:a17:902:44:: with SMTP id 62-v6mr9329731pla.193.1518897521548; Sat, 17 Feb 2018 11:58:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518897521; cv=none; d=google.com; s=arc-20160816; b=CyOELTb/8svCrbNfbA7baleoDbs336VmAes4WOFrcnND9eXset1kTkPF1mHq8p64E5 vs9v3tB33wsRrFtojJbzbZ9UAmwaI/gJcbIpLFKRkFLpoiw956NRKYi38tL9NmAA1Ncv gK/WQYGxQa9Iosmu8RMZD7TkbtUQG171CnYF+yhOn8ZqxgNGWQs2zc8LSUdOcE6tEmpC FJIb3QQLmGkuxNiVIdr3cXUQ2IlZfJjxkx3iOsgyvQsk2iAl+MMXkShmqjWFll592a6V 7hPVSGje7LhOtvJ/lG7673ORPVf0mCJtIj54FnI+SgG9SJyyzTf9kmtKUe/W6E+xhC44 eOeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=rBxt0M4qS/7bGLpaSSyW4jV+Yvh+csrsQMmeErpRXdY=; b=I/pcOlryILva7wiGQqQ+Pg4Wipr9iGVYMqW2FIrq6ltTvfn/kFnc7wJuO2UshEPSSE 8UNq3iryFB2da8sTKRptVsmjyDuGhdQl4ZfRdbL6xNPO6N2ZyLVNwlgPTKMF0nWUk+f2 OTyvXyRaBcaT22C5fYoytA2TISkGM23G9jliqn0ZjpP6MjZ953Y6MKQ3IXTPzSu6cOP/ OJJFM4jbinWleHBh8mmTPgbUxfpcVqg0JUdddwCh76kgmuGU7ooFpaCNl1bb7K7ot/uI 67XUePbpDVFAl+L/Q26fsb5J2Hec6wqt1voRChON+LoeeWUtrtMJeskK8utacRRG96YR FKqA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e2si1569086pgr.242.2018.02.17.11.58.27; Sat, 17 Feb 2018 11:58:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751540AbeBQT5K (ORCPT + 99 others); Sat, 17 Feb 2018 14:57:10 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:18001 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751278AbeBQTzJ (ORCPT ); Sat, 17 Feb 2018 14:55:09 -0500 X-UUID: ad26a9646bf94092b8381e85302f1b56-20180218 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1284004089; Sun, 18 Feb 2018 03:55:02 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Sun, 18 Feb 2018 03:55:02 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Sun, 18 Feb 2018 03:55:02 +0800 From: To: , , , , CC: , , Sean Wang Subject: [PATCH v3 07/15] arm64: dts: mt7622: turn uart0 clock to real ones Date: Sun, 18 Feb 2018 03:54:42 +0800 Message-ID: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sean Wang This patch also cleans up two oscillators that provide clocks for MT7623. Switch the uart clocks to the real ones while at it. Signed-off-by: Sean Wang Cc: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index 7256879..d8a17d1 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -91,18 +91,6 @@ }; }; - uart_clk: dummy25m { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - - bus_clk: dummy280m { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <280000000>; - }; - pwrap_clk: dummy40m { compatible = "fixed-clock"; clock-frequency = <40000000>; @@ -234,7 +222,8 @@ "mediatek,mt6577-uart"; reg = <0 0x11002000 0 0x400>; interrupts = ; - clocks = <&uart_clk>, <&bus_clk>; + clocks = <&topckgen CLK_TOP_UART_SEL>, + <&pericfg CLK_PERI_UART1_PD>; clock-names = "baud", "bus"; status = "disabled"; }; -- 2.7.4