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[209.132.180.67]) by mx.google.com with ESMTP id j2-v6si4014809plk.264.2018.02.19.01.43.27; Mon, 19 Feb 2018 01:43:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=a244NpTq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752158AbeBSJms (ORCPT + 99 others); Mon, 19 Feb 2018 04:42:48 -0500 Received: from mail-qt0-f178.google.com ([209.85.216.178]:40642 "EHLO mail-qt0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751941AbeBSJmq (ORCPT ); Mon, 19 Feb 2018 04:42:46 -0500 Received: by mail-qt0-f178.google.com with SMTP id c19so11435055qtm.7 for ; Mon, 19 Feb 2018 01:42:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=NaTh16DX0hyTrLdf5UmmZH5iLfRZujABJ15RQ2Sc+zE=; b=a244NpTqIBGG9ncVuLFHvIFIpICaUikrACwED4+UaG87KE1jhmSyN4l/L10PlewmTl 8AH8ups35JQT2dBjsGCKAN4Fj351I6zzi4CEdBi8P1qKGrkijaQM3SqFx+zVqvjR+vJx NzeECF73k3IRsKzoDJLRpYEjMAPkHcidCAO8Dijx8VXAH3jf97E+AA0G5ntkQg8LWY0W FLi82vB32FExBhkbtrTARaDl20y48W/hF2YZ548BBBOWG4GwQ7Aj4jTgbHwTtItddDxM wQOo956mfTQKMoZJFNN0saHP5RgCoQII+ehM9hgIwIFimyEeUyeP/oWPRvs3Gr/1yvQq 0FvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=NaTh16DX0hyTrLdf5UmmZH5iLfRZujABJ15RQ2Sc+zE=; b=OLZ4Rxl1d8LJwAHYSYEEb0ClAmEvzbS07KN1d1lTMHvBwsowmVWCQDON/YK50M74hj DWDkAQFe8/I2e2XZWqMEdFwgG0GqtWAEHui36+9OjvXaBe3vviRaSd/6h4Bdj/igIcjA XXE6CVzDtI/5UxfxiFNyJkk1uDcbG3hOmArFbspG4CqKSRCqRoE1rTLYP0a4U3iV73t2 KX5OPlwMeob50fkrWsrTraE2aL5bDl4BZatIE3nq5WURVQhF7NwxxclHKAL+XGJqyj3h jF1SST6cvVIPVScyfDbfInDuhIBOD+iE0GtsMGo7mQs7tk2KWBK6BY5eVv+hJF1yDTpE +nxA== X-Gm-Message-State: APf1xPCf6VBhoUwgS+FQXi25mw4g2RIN08VhyumgS2dv3o4RHjCx3Mm3 uMqp/YYX+lLdHhuZmCudGwgBPJb3IiZKwUnGANM= X-Received: by 10.200.41.231 with SMTP id 36mr7334753qtt.159.1519033365700; Mon, 19 Feb 2018 01:42:45 -0800 (PST) MIME-Version: 1.0 Received: by 10.237.45.70 with HTTP; Mon, 19 Feb 2018 01:42:45 -0800 (PST) In-Reply-To: References: <20180130202913.28724-1-thierry.escande@collabora.com> <20180130202913.28724-34-thierry.escande@collabora.com> <1517403243.14302.1.camel@pengutronix.de> From: Enric Balletbo Serra Date: Mon, 19 Feb 2018 10:42:45 +0100 Message-ID: Subject: Re: [PATCH v3 33/43] drm/panel: simple: Change mode for Sharp lq123p1jx31 To: Doug Anderson Cc: Sean Paul , Haixia Shi , Lin Huang , David Airlie , Linux Kernel Mailing List , dri-devel , Tomasz Figa , "open list:ARM/Rockchip SoC..." , Thierry Reding , Enric Balletbo i Serra , =?UTF-8?Q?=C3=98rjan_Eide?= , Zain Wang Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, 2018-02-16 21:54 GMT+01:00 Doug Anderson : > Hi, > > On Fri, Feb 16, 2018 at 4:34 AM, Enric Balletbo Serra > wrote: >> Hi, >> >> 2018-01-31 17:52 GMT+01:00 Doug Anderson : >>> Hi, >>> >>> >>> On Wed, Jan 31, 2018 at 7:16 AM, Sean Paul wrote: >>>> On Wed, Jan 31, 2018 at 7:54 AM, Lucas Stach wrote: >>>>> Am Dienstag, den 30.01.2018, 21:29 +0100 schrieb Thierry Escande: >>>>>> From: Sean Paul >>>>>> >>>>>> Change the mode for Sharp lq123p1jx31 panel to something more >>>>>> rockchip-friendly such that we can use the fixed PLLs to >>>>>> generate the pixel clock >>>>> >>>>> This should really switch to a display timing instead of exposing a >>>>> single mode. The display timing has min, typical, max tuples for all >>>>> the timings values, which would allow the attached driver to vary the >>>>> timings inside the allowed bounds if it makes sense. >>>>> >>>>> Trying to hit a specific pixel clock to free up a PLL is exactly one of >>>>> the use cases envisioned for the display timings stuff. >>>>> >>>> >>>> Agreed, I think we had this discussion the first time around. We >>>> should drop this patch. >>>> >>>> Thanks for catching this! >>> >>> Are you sure we should drop this? In order for things to work >>> properly (not generate noise on the digitizer or other EMI), this >>> needs to run at a very specific pixel clock with very specific >>> blanking times. I know that earlier we had slightly different >>> blanking times and Samsung came back and said that there was noise on >>> the digitizer. I could be wrong, but I don't think there's any way >>> currently to be able to specify exactly what timings should be used on >>> a particular board. >>> >>> Don't get be wrong--I think a patch such as this one that claims a >>> single board's timings as the "right" ones for a generic panel is a >>> bit of a hack. ...but at the same time there are no other users of >>> this panel (that I know of) in mainline and the timings presented here >>> are certainly sane timings for this panel. >>> >>> In any case, previous discussion at: https://patchwork.kernel.org/patch/9614603/ >>> >>> >>> ...oh, and looking at the previous discussion reminds me that the >>> timings presented in this here patch are actually not the right ones >>> (they have the right PLL, but the wrong blankings to avoid the noise >>> issues). See >>> >> >> As Thierry no longer has the hardware to test these patch series, I'll >> take care of these and follow the upstreaming process. I think that >> doesn't make sense send a v4 version of all 43 patches for this >> change. Right now, only this patch received comments so I'll wait a >> bit more for if we can get the other patches reviewed. If the others >> are fine just and I don't need to send a new version just don't apply >> this one and I will send a second version of that specific patch. Or >> even better, is really trivial what needs to be changed, so maybe the >> maintainer can do it? ;) > > Just as a heads up, Sean Paul has a series of patches to replace this > patch. The following are IDs from patchwork.kernel.org: > > 10207583 New [v3,1/6] dt-bindings: Clarify timing subnode use > as panel-timing > 10207585 New [v3,2/6] dt-bindings: Add headings to > simple-panel bindings > 10207591 New [v3,3/6] dt-bindings: Add panel-timing subnode > to simple-panel > 10207593 New [v3,4/6] drm/panel: simple: Add ability to > override typical timing > 10207595 New [v3,5/6] drm/panel: simple: Use display_timing > for lq123p1jx31 > 10207603 New [v3,6/6] arm64: dts: rockchip: Specify override > mode for kevin panel > > -Doug Nice, I was not aware of these, I'll test. That means that this patch can be removed from these series as the Sean solution is a lot better. Just a note that this patch can be removed without any collateral impact on the other patches, so just ignore it. Regards, Enric