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[209.132.180.67]) by mx.google.com with ESMTP id s16-v6si4206198plr.109.2018.02.19.03.26.36; Mon, 19 Feb 2018 03:26:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=BppCPCFW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752591AbeBSLVx (ORCPT + 99 others); Mon, 19 Feb 2018 06:21:53 -0500 Received: from mail-wm0-f68.google.com ([74.125.82.68]:53193 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752267AbeBSLVw (ORCPT ); Mon, 19 Feb 2018 06:21:52 -0500 Received: by mail-wm0-f68.google.com with SMTP id t3so14454090wmc.2 for ; Mon, 19 Feb 2018 03:21:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=Je2F1koy7fBrVSbrlc//iiQn4Lr7o5uJ0AKD6hSQ3ck=; b=BppCPCFW2s3E8yw93AD5Wv8GKghnecD3Lhqnh3EPLRPQV1TbOKE3aDAov56YS9aPb8 cCJw31hxWP0lRDLIUHWETgnVLDLAaC+6+MF6El+bhZ7eHojGBbm0s2dISq4TPqPQMJdP tEgi8CdHuCBHQwQEzBezN5ac1QimLpfAitTQS84hxFs0KglUGRbNVfJ2HkTcSwjx7Aa1 7Q+TUBZznJqxfggvLzJxDtlNGqME1F4++3ym1MtGH4Lxs/dqLNCoO6vvFXwaPsgP162A huZ8rId1IzoKioEud7HGSOHvKN7QI4paiEfeLh9pIv70U6U+++CcgLjE6B20OUYVSq2u sSqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Je2F1koy7fBrVSbrlc//iiQn4Lr7o5uJ0AKD6hSQ3ck=; b=J+j4jWiQct/7XchcaiSneS+fv3EBY2ousPn1QdD1NhB4HEUl6o4TbUDWhh/Vl8DG0v 5vQSOGA0zCeESRz27R2XSjt+Fu0Dl8AgujQEQ73JNTv/O93cE1XIANni7o6JAa6QrIiW BxODahoUme/C0jk5UVn6ef66NPTeZZ6Yfy/fdRcPjOYI/sOnka7hFIXhlnLPpPBZzW2O ShWftR81OfDImQDtGftbNbkR9SgyoGZfgE+srYK8hLxULZh/rkMdfPjQ1ATTrIX1SS+5 xvDLbeJBncJPScenNwlj6NdMFxG4z5S86pT+mw52ixr2l2CWWL1bSnkYPZjtZWF3HDG5 bNrA== X-Gm-Message-State: APf1xPBfT+6hl9i0wweoOrX8cFGxv5G6fwL4ljQgjq2w5wUSu2CV2f/y 3MRv9la+kYhdHz915pmeo2gy0w== X-Received: by 10.28.106.18 with SMTP id f18mr684780wmc.51.1519039310830; Mon, 19 Feb 2018 03:21:50 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id n20sm8933978wrg.84.2018.02.19.03.21.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Feb 2018 03:21:50 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Kevin Hilman Cc: Jerome Brunet , Stephen Boyd , Michael Turquette , Carlo Caione , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 00/11] clk: meson: second round of updates Date: Mon, 19 Feb 2018 12:21:35 +0100 Message-Id: <20180219112146.21746-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This changeset applies on top of the previous updates series available here [0]. Most of the changes proposed here are related to the plls of meson SoCs. Details can be found in each patches but, in nutshell, there is : * a bit of clean-up, * improved pll capabilities using the frac parameter, * several clocks added to model the tree more accurately. Beware: patch #10 depends on this core clock framework fix: [1] As explained in the description on the patch, if the gates are added w/o this fix, the system will crash when clk_disable_unused() is called. [0]: https://lkml.kernel.org/r/20180212145846.19380-1-jbrunet@baylibre.com [1]: https://lkml.kernel.org/r/20180214134340.17242-5-jbrunet@baylibre.com Jerome Brunet (11): clk: meson: add fractional part of meson8b fixed_pll clk: meson: poke pll CNTL last clk: meson: remove special gp0 lock loop clk: meson: improve pll driver results with frac clk: meson: add gp0 frac parameter for axg and gxl clk: meson: add ROUND_CLOSEST to the pll driver clk: meson: axg: add hifi clock bindings clk: meson: axg: add hifi pll clock clk: meson: add mpll pre-divider clk: meson: add fdiv clock gates clk: meson: clean-up clk81 clocks drivers/clk/meson/axg.c | 184 +++++++++++++++++++++++++++++++---- drivers/clk/meson/axg.h | 8 +- drivers/clk/meson/clk-pll.c | 154 ++++++++++++++++++----------- drivers/clk/meson/clkc.h | 15 +-- drivers/clk/meson/gxbb.c | 141 +++++++++++++++++++++++---- drivers/clk/meson/gxbb.h | 10 +- drivers/clk/meson/meson8b.c | 128 ++++++++++++++++++++---- drivers/clk/meson/meson8b.h | 8 +- include/dt-bindings/clock/axg-clkc.h | 1 + 9 files changed, 521 insertions(+), 128 deletions(-) -- 2.14.3