Received: by 10.223.185.116 with SMTP id b49csp4169505wrg; Mon, 19 Feb 2018 12:27:21 -0800 (PST) X-Google-Smtp-Source: AH8x227NVin1LZ/1Hv86qEL0a9cyzLba01EfsXCU5xGKMddvfIdGgLEhLuBjVnZdAFjpXr+EcjSc X-Received: by 10.98.9.69 with SMTP id e66mr15791774pfd.215.1519072041781; Mon, 19 Feb 2018 12:27:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519072041; cv=none; d=google.com; s=arc-20160816; b=LTK7Q9BYIy6pQnOfhKmodUc7XdwevOFHs7WMIZd8jcdKT88dl5vXFB5gztz119yb9a 1AwQ7K2wMgE8GkBxjZTTDyU/cpmRZYlQcDResW4CBT19Bq1oMKtSM6080XdiOLJt4lBL Pvs9ZzaLn1MB+1JK4AaCudZxm5dDXtYcca+2yi/iDYN0nw1PGglYwQAMvB6wvnvJQmyI cNH9DKEEtx2oo1gaPntVDZjGgq057DRUz7DkO0FrNOMRSpGO8Aihk2OKrfiDtEE7+Cnh zE/kXwOV56LKCbvskqKGfcX89T+tqmcp33tFXO8WOxFXLF8+qNMyUVd1xocW53+4hWI/ reTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=4jvzRi98OdE5GPqlfA7ricKeHKsRwXl31ydOvjvLBkk=; b=u/2vQX1U0fsgUsCA5jCOyYmKInq5dKCmNBF3wyP808XIgDOY3Tb1GqBN3dupgnjScN qcpVXgiFcf7/RfhpGEaydYjFXISN48+/fH+C6p5tY/U4YB3fPGNc50LKQEn4Ng+D6o+J Ca4JZeRzdI0QPZfrozLmVvbHFQJcJ1i3SoqQYf5zNPMTyvAi/9mcX0FnLfZJabt3rPUU RXhBH2OHd8vxe6zmAh3kgKX1iPNypiT2N25lhwhueV3cK1ovnCM/lEfBv3R+B/yrXMpu LKd4+s2lbytVSBeuf94LZEgLI4At8eAxo+TtnfRQpCxHK893UDKaezfGZ2OZUqOlYT/i ISAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=Z6GSsgIR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k186si3058535pfc.265.2018.02.19.12.27.07; Mon, 19 Feb 2018 12:27:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=Z6GSsgIR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932312AbeBSUZX (ORCPT + 99 others); Mon, 19 Feb 2018 15:25:23 -0500 Received: from vern.gendns.com ([206.190.152.46]:58591 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932201AbeBSUXM (ORCPT ); Mon, 19 Feb 2018 15:23:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=References:In-Reply-To:Message-Id:Date:Subject :Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=4jvzRi98OdE5GPqlfA7ricKeHKsRwXl31ydOvjvLBkk=; b=Z6GSsgIRjFeAtUPbJuvX+Ikxu suourKf2AbthsGHTheL9Y+4QUpqZgbUESpr6/vN4EiimhY34qW8dqISsl/7ikYJLLHFaUXYcMdkWf iVGxPAjePfURPqQsW1FhJZRp5fNZE588YQv1rPKkih90OdIS2CReLcIl6Wqz1ctvGu0MfMQemHHmj As+lBIDBdG4tWJBvrB8TYfyKzVt0lRAHO31HP7u0PF2GcSpHOtavHBGGuWtq0mXm8cBbUMGNzskpn 66LD0SiClzU4+yDg2ekTIGZAUVWCPoBoybXB574d57PRpdNbFzpMYgOjRXG2iAZpLveUCL9ZdtnqG CW4Ls1itQ==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:48842 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1enrwd-003xBV-3L; Mon, 19 Feb 2018 15:21:51 -0500 From: David Lechner To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Adam Ford , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v7 22/42] ARM: davinci: da850: add new clock init using common clock framework Date: Mon, 19 Feb 2018 14:21:43 -0600 Message-Id: <1519071723-31790-23-git-send-email-david@lechnology.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519071723-31790-1-git-send-email-david@lechnology.com> References: <1519071723-31790-1-git-send-email-david@lechnology.com> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds the new board-specific clock init in mach-davinci/da850.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Some CFGCHIP macros were removed because we are now including linux/mfd/da8xx-cfgchip.h which defines the same values. Signed-off-by: David Lechner --- v7 changes: - add clock platform device declarations - register platform devices instead of registering clocks directly - clkdev lookup is moved to drivers/clk - add davinci prefix to commit description v6 changes: - add blank lines between function calls - include da8xx_register_cfgchip() - add async1 and async2 clock domains arch/arm/mach-davinci/board-da850-evm.c | 2 + arch/arm/mach-davinci/board-mityomapl138.c | 2 + arch/arm/mach-davinci/board-omapl138-hawk.c | 2 + arch/arm/mach-davinci/da850.c | 143 +++++++++++++++++++++++++--- arch/arm/mach-davinci/da8xx-dt.c | 2 + arch/arm/mach-davinci/include/mach/da8xx.h | 1 + 6 files changed, 139 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 3063478..78a670a 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -1334,6 +1334,8 @@ static __init void da850_evm_init(void) { int ret; + da850_register_clocks(); + ret = da850_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index d1c8548..f442784 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c @@ -502,6 +502,8 @@ static void __init mityomapl138_init(void) { int ret; + da850_register_clocks(); + /* for now, no special EDMA channels are reserved */ ret = da850_register_edma(NULL); if (ret) diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index e2ba9da..6a4e486 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -281,6 +281,8 @@ static __init void omapl138_hawk_init(void) { int ret; + da850_register_clocks(); + ret = da850_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 1dbf01c..9086f2b 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -11,39 +11,43 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. */ + +#include #include +#include #include #include -#include +#include +#include +#include #include -#include +#include #include -#include #include -#include "psc.h" -#include -#include #include -#include -#include #include +#include +#include +#include #include +#include -#include "clock.h" #include "mux.h" +#ifndef CONFIG_COMMON_CLK +#include "clock.h" +#include "psc.h" +#endif + #define DA850_PLL1_BASE 0x01e1a000 #define DA850_TIMER64P2_BASE 0x01f0c000 #define DA850_TIMER64P3_BASE 0x01f0d000 #define DA850_REF_FREQ 24000000 -#define CFGCHIP3_ASYNC3_CLKSRC BIT(4) -#define CFGCHIP3_PLL1_MASTER_LOCK BIT(5) -#define CFGCHIP0_PLL_MASTER_LOCK BIT(4) - +#ifndef CONFIG_COMMON_CLK static int da850_set_armrate(struct clk *clk, unsigned long rate); static int da850_round_armrate(struct clk *clk, unsigned long rate); static int da850_set_pll0rate(struct clk *clk, unsigned long armrate); @@ -583,6 +587,7 @@ static struct clk_lookup da850_clks[] = { CLK("ecap.2", "fck", &ecap2_clk), CLK(NULL, NULL, NULL), }; +#endif /* * Device specific mux setup @@ -1170,6 +1175,7 @@ int da850_register_cpufreq(char *async_clk) return platform_device_register(&da850_cpufreq_device); } +#ifndef CONFIG_COMMON_CLK static int da850_round_armrate(struct clk *clk, unsigned long rate) { int ret = 0, diff; @@ -1232,12 +1238,14 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long rate) return 0; } +#endif /* CONFIG_COMMON_CLK */ #else int __init da850_register_cpufreq(char *async_clk) { return 0; } +#ifndef CONFIG_COMMON_CLK static int da850_set_armrate(struct clk *clk, unsigned long rate) { return -EINVAL; @@ -1252,6 +1260,7 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate) { return clk->rate; } +#endif /* CONFIG_COMMON_CLK */ #endif /* VPIF resource, platform data */ @@ -1395,6 +1404,114 @@ void __init da850_init(void) void __init da850_init_time(void) { +#ifdef CONFIG_COMMON_CLK + struct clk *clk; + + clk = clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA850_REF_FREQ); + + davinci_timer_init(clk); +#else davinci_clk_init(da850_clks); davinci_timer_init(&timerp64_0_clk); +#endif +} + +static struct resource da850_pll0_resources[] = { + { + .start = DA8XX_PLL0_BASE, + .end = DA8XX_PLL0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_pll0_device = { + .name = "da850-pll0", + .id = -1, + .resource = da850_pll0_resources, + .num_resources = ARRAY_SIZE(da850_pll0_resources), +}; + +static struct resource da850_pll1_resources[] = { + { + .start = DA850_PLL1_BASE, + .end = DA850_PLL1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_pll1_device = { + .name = "da850-pll1", + .id = -1, + .resource = da850_pll1_resources, + .num_resources = ARRAY_SIZE(da850_pll1_resources), +}; + +static struct resource da850_psc0_resources[] = { + { + .start = DA8XX_PSC0_BASE, + .end = DA8XX_PSC0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_psc0_device = { + .name = "da850-psc0", + .id = -1, + .resource = da850_psc0_resources, + .num_resources = ARRAY_SIZE(da850_psc0_resources), +}; + +static struct resource da850_psc1_resources[] = { + { + .start = DA8XX_PSC1_BASE, + .end = DA8XX_PSC1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da850_psc1_device = { + .name = "da850-psc1", + .id = -1, + .resource = da850_psc1_resources, + .num_resources = ARRAY_SIZE(da850_psc1_resources), +}; + +static struct platform_device da850_async1_clksrc_device = { + .name = "da850-async1-clksrc", + .id = -1, +}; + +static struct platform_device da850_async3_clksrc_device = { + .name = "da850-async3-clksrc", + .id = -1, +}; + +static struct platform_device da830_tbclksync_device = { + .name = "da830-tbclksync", + .id = -1, +}; + +void __init da850_register_clocks(void) +{ + static struct da8xx_cfgchip_clk_platform_data async1_pdata; + static struct da8xx_cfgchip_clk_platform_data async3_pdata; + static struct da8xx_cfgchip_clk_platform_data tbclksync_pdata; + + platform_device_register(&da850_pll0_device); + platform_device_register(&da850_pll1_device); + + async1_pdata.cfgchip = da8xx_get_cfgchip(); + da850_async1_clksrc_device.dev.platform_data = &async1_pdata; + platform_device_register(&da850_async1_clksrc_device); + + async3_pdata.cfgchip = da8xx_get_cfgchip(); + da850_async3_clksrc_device.dev.platform_data = &async3_pdata; + platform_device_register(&da850_async3_clksrc_device); + + platform_device_register(&da850_psc0_device); + platform_device_register(&da850_psc1_device); + + tbclksync_pdata.cfgchip = da8xx_get_cfgchip(); + da830_tbclksync_device.dev.platform_data = &tbclksync_pdata; + platform_device_register(&da830_tbclksync_device); } diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index ab199f4..91dd9cb 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -67,6 +67,8 @@ static void __init da850_init_machine(void) int ret; + da850_register_clocks(); + ret = da8xx_register_usb20_phy_clk(false); if (ret) pr_warn("%s: registering USB 2.0 PHY clock failed: %d", diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 64861ac..612e454 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -93,6 +93,7 @@ void da830_register_clocks(void); void da850_init(void); void da850_init_time(void); +void da850_register_clocks(void); int da830_register_edma(struct edma_rsv_info *rsv); int da850_register_edma(struct edma_rsv_info *rsv[2]); -- 2.7.4