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a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amd-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=R9RT8s/flWK+Kp1JiofGVbkeuE/8JQDWu4Efdv2yRUc=; b=44ePuWkS1CejPDMcB6vjbjDurPRKDUHT5cDQ85pd9BX3lWc4B2yESCWqlKEg3QEfQLKBNj0CmDw2HVVciHHtYnMVlvWPtLkR8W4OuCueQOHRDGcjPTTKgwpqWhIxOe3C876P8Ews8I2HUzNxt1Jq77NBjr2LD6qbmL4rehOCLV0= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Thomas.Lendacky@amd.com; Received: from [10.236.65.116] (165.204.78.1) by CY4PR12MB1144.namprd12.prod.outlook.com (2603:10b6:903:38::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.506.18; Tue, 20 Feb 2018 15:22:19 +0000 Subject: Re: [PATCH v3 3/6] x86/cpufeatures: Add AMD feature bits for Speculation Control From: Tom Lendacky To: David Woodhouse , Greg KH Cc: arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, bp@alien8.de, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, dave.hansen@intel.com, gnomes@lxorguk.ukuu.org.uk References: <1516813025-10794-1-git-send-email-dwmw@amazon.co.uk> <1516813025-10794-4-git-send-email-dwmw@amazon.co.uk> <20180124172002.GE16646@kroah.com> <1516816633.13558.166.camel@infradead.org> Message-ID: Date: Tue, 20 Feb 2018 09:22:08 -0600 User-Agent: Mozilla/5.0 (Windows NT 10.0; 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The CPUID/MSR information is published: https://developer.amd.com/wp-content/resources/Architecture_Guidelines_Update_Indirect_Branch_Control.pdf Thanks, Tom > > Thanks, > Tom > >>