Received: by 10.223.185.116 with SMTP id b49csp376279wrg;
        Tue, 20 Feb 2018 23:17:05 -0800 (PST)
X-Google-Smtp-Source: AH8x225D0Kf5nai+92vNOOmPrAfplq8ZhI1npXcNE6H8plgXeU8lF0T8WwleSsqDS2K0b0sZPL+6
X-Received: by 10.98.31.155 with SMTP id l27mr2376374pfj.176.1519197425723;
        Tue, 20 Feb 2018 23:17:05 -0800 (PST)
ARC-Seal: i=1; a=rsa-sha256; t=1519197425; cv=none;
        d=google.com; s=arc-20160816;
        b=xLtjx/Uh4qj2jqX53w6nYTSeTnKfNGFtYaGhiMb7HwVQaE6UpXz4u9JALOdPC8xKIL
         P7FsL3QeKRTcFW6aMA+fH1X6lanXYGYn2dSt8z2eE9cBZqPF6HvOsaADpPbCIQvaNP2E
         Jb3qkASjD696mACWwS63buXXkf89rw6P/PX0wvgMwbURhAPZsvGLwc/wU8LjK8FVq4ab
         wN/hQ5QZCGCVUOhAnRuAm6/OX3soZJb9JOgLl9jf92q29L/o6IWvLWeB4ALb5HeBNtoO
         QFnHI3qeIcyhR96rusNlMsTU7etwfRNdBd8qQoflCgKBTlEyqPKwg4VQmX1hLF9HpKvZ
         VtpQ==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:mime-version:references:in-reply-to
         :message-id:date:subject:cc:to:from:arc-authentication-results;
        bh=GRuCgM09V3EDVYBgNx7hUgZc0TAkwLNljd/WjUgsMMg=;
        b=K2dDHh0H+U4u2pqdRywGzhiBLYMWt9FEpmHralWohCalbw85JCVFySQ1nmSDNxcUy9
         T95vjQ5uYwMY5SkvBcRYgHBpfgda0iYH8QDu01nnM/eKRWpj1ZWFEinAd8z1omHKUcsp
         tnJ6+kYn808tuJkxFKnqdNdhFewFMJLOhQOTEU1RvFfo1DVVInMWlB3b/QFdlnjWOGNg
         TXIbUe/nH53IyanaidkIZVP05fyISVX82FkI07bblyJLq9NNzPIfA1rJTvxgNFFYUM3p
         fYfVEmdcbpVUxGETpfsI77vR+2p2ZSffuYw3YH/QudnIdrCYEz8+kOp4y068QnvzfXrt
         z5Kw==
ARC-Authentication-Results: i=1; mx.google.com;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67])
        by mx.google.com with ESMTP id bg3-v6si1597368plb.28.2018.02.20.23.16.51;
        Tue, 20 Feb 2018 23:17:05 -0800 (PST)
Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Authentication-Results: mx.google.com;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1751623AbeBUG7n (ORCPT <rfc822;lans.zhang2008@gmail.com>
        + 99 others); Wed, 21 Feb 2018 01:59:43 -0500
Received: from hqemgate14.nvidia.com ([216.228.121.143]:16239 "EHLO
        hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1751565AbeBUG7j (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Wed, 21 Feb 2018 01:59:39 -0500
Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com
        id <B5a8d18e00000>; Tue, 20 Feb 2018 22:59:44 -0800
Received: from HQMAIL107.nvidia.com ([172.20.161.6])
  by hqpgpgate101.nvidia.com (PGP Universal service);
  Tue, 20 Feb 2018 22:59:38 -0800
X-PGP-Universal: processed;
        by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 22:59:38 -0800
Received: from UKMAIL102.nvidia.com (10.26.138.15) by HQMAIL107.nvidia.com
 (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb
 2018 06:59:37 +0000
Received: from HQMAIL105.nvidia.com (172.20.187.12) by UKMAIL102.nvidia.com
 (10.26.138.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb
 2018 06:59:33 +0000
Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com
 (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend
 Transport; Wed, 21 Feb 2018 06:59:25 +0000
From:   Rajkumar Rampelli <rrajk@nvidia.com>
To:     <robh+dt@kernel.org>, <mark.rutland@arm.com>,
        <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
        <jdelvare@suse.com>, <linux@roeck-us.net>, <corbet@lwn.net>,
        <catalin.marinas@arm.com>, <will.deacon@arm.com>,
        <kstewart@linuxfoundation.org>, <gregkh@linuxfoundation.org>,
        <pombredanne@nexb.com>, <mmaddireddy@nvidia.com>,
        <mperttunen@nvidia.com>, <arnd@arndb.de>,
        <gregory.clement@free-electrons.com>, <timur@codeaurora.org>,
        <andy.gross@linaro.org>, <xuwei5@hisilicon.com>,
        <elder@linaro.org>, <heiko@sntech.de>, <krzk@kernel.org>,
        <ard.biesheuvel@linaro.org>
CC:     <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-pwm@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
        <linux-hwmon@vger.kernel.org>, <linux-doc@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>, <ldewangan@nvidia.com>,
        <rrajk@nvidia.com>
Subject: [PATCH 02/10] dt-bindings: Tegra186 tachometer device tree bindings
Date:   Wed, 21 Feb 2018 12:28:51 +0530
Message-ID: <1519196339-9377-3-git-send-email-rrajk@nvidia.com>
X-Mailer: git-send-email 2.1.4
In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com>
References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com>
MIME-Version: 1.0
Content-Type: text/plain
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Supply Device tree binding documentation for the NVIDIA
Tegra186 SoC's Tachometer Controller

Signed-off-by: Rajkumar Rampelli <rrajk@nvidia.com>
---
 .../bindings/pwm/pwm-tegra-tachometer.txt          | 31 ++++++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/pwm-tegra-tachometer.txt

diff --git a/Documentation/devicetree/bindings/pwm/pwm-tegra-tachometer.txt b/Documentation/devicetree/bindings/pwm/pwm-tegra-tachometer.txt
new file mode 100644
index 0000000..4a7ead4
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-tegra-tachometer.txt
@@ -0,0 +1,31 @@
+Bindings for a PWM based Tachometer driver
+
+Required properties:
+- compatible: Must be "nvidia,tegra186-pwm-tachometer"
+- reg: physical base addresses of the controller and length of
+  memory mapped region.
+- #pwm-cells: should be 2. See pwm.txt in this directory for a
+  description of the cells format.
+- clocks: phandle list of tachometer clocks
+- clock-names: should be "tachometer". See clock-bindings.txt in documentations
+- resets: phandle to the reset controller for the Tachometer IP
+- reset-names: should be "tachometer". See reset.txt in documentations
+- nvidia,pulse-per-rev: Integer, pulses per revolution of a Fan. This value
+  obtained from Fan specification document.
+- nvidia,capture-window-len: Integer, window of the Fan Tach monitor, it indicates
+  that how many period of the input fan tach signal will the FAN TACH logic
+  monitor. Valid values are 1, 2, 4 and 8 only.
+
+Example:
+	tegra_tachometer: tachometer@39c0000 {
+		compatible = "nvidia,tegra186-pwm-tachometer";
+		reg = <0x0 0x039c0000 0x0 0x10>;
+		#pwm-cells = <2>;
+		clocks = <&tegra_car TEGRA186_CLK_TACH>;
+		clock-names = "tachometer";
+		resets = <&tegra_car TEGRA186_RESET_TACH>;
+		reset-names = "tachometer";
+		nvidia,pulse-per-rev = <2>;
+		nvidia,capture-window-len = <2>;
+		status = "disabled";
+	};
-- 
2.1.4