Received: by 10.223.185.116 with SMTP id b49csp1813827wrg; Thu, 22 Feb 2018 03:39:18 -0800 (PST) X-Google-Smtp-Source: AH8x225YtL/SlWsyUhHO2D9oj5tCVO3HV2NBh6tsCHpO2vf9Nwos0Db3tWJTePUabmVuQF7lUqCD X-Received: by 2002:a17:902:149:: with SMTP id 67-v6mr6261363plb.73.1519299558087; Thu, 22 Feb 2018 03:39:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519299558; cv=none; d=google.com; s=arc-20160816; b=fPBwsd+SMGvi7WZDBjpu9gVxmbkDO6Bv61JYIueTdWT7CHCgtAPEnFxMqWSDJEgkkb v1PF34dbbEszBsIPmI83raGfEu+VW9Iy1QS/kF4dw9xQJWVbIBPA8SKEaniq1vySYHXc S2GZPDGDXXcle/4Uzc7qN2/OKoQiRRhIiJJK4YvfLfyBBdEqAfe+NphR1MRLb8FmPP7n EHqR58046ykVextikXapFVMsUu0R6Q6BwB21YpL0sXOdrbxYfgqvnMM6MpYIiDpQu873 Ki3/mTzLHayF/jQbgGYvlY9hMIFLZ026yVnvF2sj8DQKfHqukWo/TmT4sNbQ1fEoS7L8 3lcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:arc-authentication-results; bh=K+A22ydPrSc/Yu6/Sk+uDA6+aoPMOOULsxMFQZayGrk=; b=OfpzZc2esnP7SyhF7gcZhfCTdzTWCDZO2bPC5Yz7ror5YES84A67XXvCH4LWBEyh14 1dzsBYf37RwA/THZHKjaRCsSfBLwREikE0b3v7kGUla8XbMczq/fTc2q1l5STBlGv1Ks 6ZtgdXJ8aRNqrrFLGJnF7bPVzwle8/y0O4YjS80JrVQfu6JP/EZQn75FZ8ucbPbgvdKJ KqRjdgBmFeamNIgdCz4EFajJzLZnh2fQ5/eHGbdlCOoRyUSMCRQ+k174R9/EIJ+fenaW NmnZqLIUAfoy5KogfyTjwppBCKz6A0gKXXoEBLcpwBqHzkcQYO2ykV3lBRw1MfU6D1GO yH5g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i124si3613681pgc.589.2018.02.22.03.39.03; Thu, 22 Feb 2018 03:39:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753649AbeBVLiZ (ORCPT + 99 others); Thu, 22 Feb 2018 06:38:25 -0500 Received: from foss.arm.com ([217.140.101.70]:39482 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753531AbeBVLiY (ORCPT ); Thu, 22 Feb 2018 06:38:24 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AB2C51596; Thu, 22 Feb 2018 03:38:23 -0800 (PST) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DE95E3F25C; Thu, 22 Feb 2018 03:38:21 -0800 (PST) Date: Thu, 22 Feb 2018 11:38:19 +0000 From: Mark Rutland To: Robin Murphy Cc: shankerd@codeaurora.org, Philip Elcan , Vikram Sethi , Marc Zyngier , Catalin Marinas , Will Deacon , linux-kernel , kvmarm , linux-arm-kernel Subject: Re: [PATCH v3] arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC Message-ID: <20180222113818.6cknpwfbed2ab2nd@lakrids.cambridge.arm.com> References: <1519220946-13901-1-git-send-email-shankerd@codeaurora.org> <20180221150929.hkvtwu4fgfeis5cy@salmiak> <5be4684b-e2d8-1b3b-4c96-03c7dae0b619@codeaurora.org> <0eb2d23b-cf96-c7ff-9820-16ed113f4862@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <0eb2d23b-cf96-c7ff-9820-16ed113f4862@arm.com> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 21, 2018 at 04:51:40PM +0000, Robin Murphy wrote: > On 21/02/18 16:14, Shanker Donthineni wrote: > [...] > > > > @@ -1100,6 +1114,20 @@ static int cpu_copy_el2regs(void *__unused) > > > > .enable = cpu_clear_disr, > > > > }, > > > > #endif /* CONFIG_ARM64_RAS_EXTN */ > > > > +#ifdef CONFIG_ARM64_SKIP_CACHE_POU > > > > + { > > > > + .desc = "DCache clean to POU", > > > > > > This description is confusing, and sounds like it's describing DC CVAU, rather > > > than the ability to ellide it. How about: > > > > Sure, I'll take your suggestion. > > Can we at least spell "elision" correctly please? ;) Argh. Yes. > Personally I read DIC and IDC as "D-cache to I-cache coherency" and "I-cache > to D-cache coherency" respectively (just my interpretation, I've not looked > into the spec work for any hints of rationale), but out loud those do sound > so poorly-defined that keeping things in terms of the required maintenance > probably is better. So long as we have (IDC) and (DIC) in the text to avoid ambiguity, I'm not that worried either way. Thanks, Mark.