Received: by 10.223.185.116 with SMTP id b49csp509609wrg; Fri, 23 Feb 2018 02:17:52 -0800 (PST) X-Google-Smtp-Source: AH8x224KSqjMaQWhcUsTPJ3KQFngt15W90RlsmmTYf5LeykEh/TrAdKmfVFmpIIXgGs/ROzla3Vo X-Received: by 2002:a17:902:8f89:: with SMTP id z9-v6mr1266623plo.370.1519381071941; Fri, 23 Feb 2018 02:17:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519381071; cv=none; d=google.com; s=arc-20160816; b=JBbt763pwJYlgE0HCwD57l0mWYhNhEaFYHFuOXPzWt5RxKssQREjlA7zUOwRkV4FOo h0j1rMk1KttZz1QKz/pftw8LcHagM9I1MTQgfjy3/JsQGNQXTZZDUdLMp2cvqcigU1z7 tnHNydi50tPBeXZH4S5sQSTDr0rv6vwSjHfVee2u2HgSICX/CazRlMLCWquM/1RsGSrl jpHNGRmWBrR5nKu6T7+ql+N51V+Iq1LBiywYmkTO0FuIH8vrRL+7y29HiBRgFsQ9SnQC 7/15Q3VsxW3dfziXkjO1Gi/Ts4l9utMgK3y2QqEkfZI1hwRrFkPHUrZOu8K5HpeO/x7A T1uA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=2WM1G1QRgRNn+dhp0/NOeqJ8VRzZ8ml9ejinAOygB7w=; b=tmS6dTD4/WNfNfNGJmhg2jl28hKIxUSgeevwJerHM40LPZ54/NHj40Todn4Sm6Ax9K 5kGUdPJzQbPNq3TbPls/LpN7io5kwHEKrt2zcPIFBM89bfB1lB/jtV1lOdSJNyh0Ox54 TgOMqfchdJzZbzZWqGzgyvAwWtaTC5vRl0y5I8ywG67wfSLgVU6pn3z4FIJE5muozMyM iPg+TvpKjqpL0ealAW0frvq0KDRi8EbIsJTot7uyBZ2W5YxVWhHBbrDigVUUI1mfiSeo V7URI2eQHOiUory2NaQVxmuA1ILYy3MKaWUtRUTynItZZdJKXQy3PRSLfTEpSKgJAmlw 8XZA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y1si1345667pgv.234.2018.02.23.02.17.37; Fri, 23 Feb 2018 02:17:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751677AbeBWKRA (ORCPT + 99 others); Fri, 23 Feb 2018 05:17:00 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:23098 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751579AbeBWKQy (ORCPT ); Fri, 23 Feb 2018 05:16:54 -0500 X-UUID: 77a2d9838df8461a8bf1e2a581e63bb0-20180223 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 2077253896; Fri, 23 Feb 2018 18:16:49 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Fri, 23 Feb 2018 18:16:48 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Fri, 23 Feb 2018 18:16:48 +0800 From: To: , , , , CC: , , Sean Wang , Linus Walleij , Subject: [PATCH v1 03/19] dt-bindings: pinctrl: mediatek: add bindings for I2C2 and SPI2 on MT7623 Date: Fri, 23 Feb 2018 18:16:23 +0800 Message-ID: <607af13d88f733057df2ea057228e1cdbf77262a.1519378871.git.sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sean Wang Add missing pinctrl binding about I2C2 and SPI2 which would be used in devicetree related files. Signed-off-by: Sean Wang Cc: Rob Herring Cc: Mark Rutland Cc: Linus Walleij Cc: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org --- include/dt-bindings/pinctrl/mt7623-pinfunc.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/include/dt-bindings/pinctrl/mt7623-pinfunc.h b/include/dt-bindings/pinctrl/mt7623-pinfunc.h index 2d6a7b1..4878a67 100644 --- a/include/dt-bindings/pinctrl/mt7623-pinfunc.h +++ b/include/dt-bindings/pinctrl/mt7623-pinfunc.h @@ -251,6 +251,12 @@ #define MT7623_PIN_76_SCL0_FUNC_GPIO76 (MTK_PIN_NO(76) | 0) #define MT7623_PIN_76_SCL0_FUNC_SCL0 (MTK_PIN_NO(76) | 1) +#define MT7623_PIN_77_SDA2_FUNC_GPIO77 (MTK_PIN_NO(77) | 0) +#define MT7623_PIN_77_SDA2_FUNC_SDA2 (MTK_PIN_NO(77) | 1) + +#define MT7623_PIN_78_SCL2_FUNC_GPIO78 (MTK_PIN_NO(78) | 0) +#define MT7623_PIN_78_SCL2_FUNC_SCL2 (MTK_PIN_NO(78) | 1) + #define MT7623_PIN_79_URXD0_FUNC_GPIO79 (MTK_PIN_NO(79) | 0) #define MT7623_PIN_79_URXD0_FUNC_URXD0 (MTK_PIN_NO(79) | 1) #define MT7623_PIN_79_URXD0_FUNC_UTXD0 (MTK_PIN_NO(79) | 2) @@ -291,6 +297,24 @@ #define MT7623_PIN_100_MIPI_TDP0_FUNC_GPIO100 (MTK_PIN_NO(100) | 0) #define MT7623_PIN_100_MIPI_TDP0_FUNC_TDP0 (MTK_PIN_NO(100) | 1) +#define MT7623_PIN_101_SPI2_CSN_FUNC_GPIO101 (MTK_PIN_NO(101) | 0) +#define MT7623_PIN_101_SPI2_CSN_FUNC_SPI2_CS (MTK_PIN_NO(101) | 1) +#define MT7623_PIN_101_SPI2_CSN_FUNC_SCL3 (MTK_PIN_NO(101) | 3) + +#define MT7623_PIN_102_SPI2_MI_FUNC_GPIO102 (MTK_PIN_NO(102) | 0) +#define MT7623_PIN_102_SPI2_MI_FUNC_SPI2_MI (MTK_PIN_NO(102) | 1) +#define MT7623_PIN_102_SPI2_MI_FUNC_SPI2_MO (MTK_PIN_NO(102) | 2) +#define MT7623_PIN_102_SPI2_MI_FUNC_SDA3 (MTK_PIN_NO(102) | 3) + +#define MT7623_PIN_103_SPI2_MO_FUNC_GPIO103 (MTK_PIN_NO(103) | 0) +#define MT7623_PIN_103_SPI2_MO_FUNC_SPI2_MO (MTK_PIN_NO(103) | 1) +#define MT7623_PIN_103_SPI2_MO_FUNC_SPI2_MI (MTK_PIN_NO(103) | 2) +#define MT7623_PIN_103_SPI2_MO_FUNC_SCL3 (MTK_PIN_NO(103) | 3) + +#define MT7623_PIN_104_SPI2_CK_FUNC_GPIO104 (MTK_PIN_NO(104) | 0) +#define MT7623_PIN_104_SPI2_CK_FUNC_SPI2_CK (MTK_PIN_NO(104) | 1) +#define MT7623_PIN_104_SPI2_CK_FUNC_SDA3 (MTK_PIN_NO(104) | 3) + #define MT7623_PIN_105_MSDC1_CMD_FUNC_GPIO105 (MTK_PIN_NO(105) | 0) #define MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD (MTK_PIN_NO(105) | 1) #define MT7623_PIN_105_MSDC1_CMD_FUNC_SDA1 (MTK_PIN_NO(105) | 3) -- 2.7.4