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[209.132.180.67]) by mx.google.com with ESMTP id l16-v6si1730256pli.356.2018.02.23.03.42.51; Fri, 23 Feb 2018 03:43:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=hASQpeql; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751378AbeBWLlp (ORCPT + 99 others); Fri, 23 Feb 2018 06:41:45 -0500 Received: from mail-qt0-f193.google.com ([209.85.216.193]:40080 "EHLO mail-qt0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750827AbeBWLlo (ORCPT ); Fri, 23 Feb 2018 06:41:44 -0500 Received: by mail-qt0-f193.google.com with SMTP id c19so10175550qtm.7 for ; Fri, 23 Feb 2018 03:41:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=ZIiHd5945PzNmwWWLG7HLwWTQlIDF99LU61FMjGGuYI=; b=hASQpeqlle4DxRqFb4cT7GIHuKwlz0F4QrOObiMbCZBOVwj4qyauSZe/pIuWA5fk1f w7SfEJov4MMPjYePr4v3HqGQAjOD8Wc7GyKHDFcSppTTmShl3Tw+8MJlDNFe64hbVCp9 q/aEEFuQ3nbe/wieQfQD7ea72w8xWtsR5vYbICm9oZi4Z1IB/2lyn5kPe1zO8sp7L3EO ZRwJt7jvA93DHa/xzTo85uuFh3mh7iaRE401jIhFMSVNKmMNKpVfdvpFaSf8VWd41gEu TA8bd11T/6luN0HFZz9iK2wd9vC1ax+wfhn9Faidw4iuMfibdgDPjNoN2OX0WJC+I6oW QM0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=ZIiHd5945PzNmwWWLG7HLwWTQlIDF99LU61FMjGGuYI=; b=LztzrjYCCAo4yGoDNlhEy73orR60lPNTx7QE2oWOAax8tE0McB7jGgrXBvRRcEiF2n Zp6dUKl+AWB4Nc3k7ZSf6ly7LWaDF9Y46s4svQo5cs6fBJq5zGcbv8iq6gX5xn9oJmFr JH85zGcw3XvSxpBc7JAdphcRalf3upH3jLEZzf5UQpX0qcWqZjioU0+kVYuKf4W5xDkU qnygWaG/gqkRiD86vQrZ9/Ao1pGRWcLB7vbPfIzcVNDInNHyt2I9n3N6EhHX/Ph5JLOM gWttMOm0mxCH1gHMkNC7OzR+FvXMMkq+QnoT6jPBzGc4+zjZCdq4yBjZWEZFGBqfdDn9 vRDA== X-Gm-Message-State: APf1xPCDhFGuDkepYCTRYPxOoXV7+PArXK9wT0kQLfClWa7hbL229OOB dL8Viv9DkT2pJk2LP4d586fikNQbx6StTsZcRafIOw== X-Received: by 10.200.1.17 with SMTP id e17mr2117924qtg.137.1519386104118; Fri, 23 Feb 2018 03:41:44 -0800 (PST) MIME-Version: 1.0 Received: by 10.200.42.33 with HTTP; Fri, 23 Feb 2018 03:41:43 -0800 (PST) In-Reply-To: <91e55d2b-abd0-35b4-cc18-98a96288f8de@lechnology.com> References: <20180219165837.28913-1-brgl@bgdev.pl> <72cd2af4-ed6b-8c1b-2488-b999976b894a@lechnology.com> <1519123185.3470.5.camel@pengutronix.de> <8ef4b901-f38d-d885-e7bc-657202a2e248@lechnology.com> <1519299294.7447.4.camel@pengutronix.de> <91e55d2b-abd0-35b4-cc18-98a96288f8de@lechnology.com> From: Bartosz Golaszewski Date: Fri, 23 Feb 2018 12:41:43 +0100 Message-ID: Subject: Re: [PATCH v4] reset: add support for non-DT systems To: David Lechner Cc: Philipp Zabel , Linux Kernel Mailing List , Bartosz Golaszewski , Sekhar Nori , Kevin Hilman Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2018-02-22 17:44 GMT+01:00 David Lechner : > On 02/22/2018 05:34 AM, Philipp Zabel wrote: >> >> On Tue, 2018-02-20 at 10:40 -0600, David Lechner wrote: >> [...] >>>> >>>> In your case the platform code that adds the lookup may be identical to >>>> the code that registers the struct reset_controller_dev, but that >>>> doesn't have to be the case. I'm not sure how that is supposed to work >>>> for the phy framework (I see no platform code adding phy lookups, only >>>> drivers). >>>> >>> In our use case, we would be adding the lookup in the driver rather than >>> in the platform code, which is why I am suggesting doing it like the phy >>> framework. >> >> >> Shouldn't it be the job of the platform code to describe the connections >> between reset controller and peripheral module reset >> inputs? > > > > I guess that depends on who you ask. There are many clock driver that > register clkdev lookups in drivers/clk/, so that is what we have done > with the clock driver we are working on. The clock device is also the > reset controller, so it makes sense to me to register the reset lookup > in the same place that we are registering the clkdev lookup. > > We have a platform_device_id for each possible configuration, so that > it works very much like the device tree compatible string. You register > a platform device in the board file with the proper name and the driver > takes care of the reset because it knows which connections there are > based on the device name. I sent another attempt. Since the in-progress psc driver has all the clocks in the driver code, it makes sense to do the same for resets. Bart