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[209.132.180.67]) by mx.google.com with ESMTP id p26si1922842pfh.43.2018.02.23.06.23.32; Fri, 23 Feb 2018 06:23:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Sy56J9s6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751437AbeBWOWr (ORCPT + 99 others); Fri, 23 Feb 2018 09:22:47 -0500 Received: from mail-it0-f68.google.com ([209.85.214.68]:35195 "EHLO mail-it0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751381AbeBWOWo (ORCPT ); Fri, 23 Feb 2018 09:22:44 -0500 Received: by mail-it0-f68.google.com with SMTP id v194so3352998itb.0 for ; Fri, 23 Feb 2018 06:22:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=bho37g6s/5pz8I+YNDe97ZGynO5HrvAUAEmga7SfgyY=; b=Sy56J9s6j7Dbkjj8WrVgSKJshDHIGRpYvu+1pbtfYjeBWP6HUVJL8MTPzjmAWB03l3 dzhAKp54jWDaXK/ve16/Y/GBNdRSAwP0wFugSRcvDrb3UrYGU0UyB07yjGilmhY98N2H T28YTpseRvSmhEpmQBVHVBH0q9G0LQMvJDiwI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=bho37g6s/5pz8I+YNDe97ZGynO5HrvAUAEmga7SfgyY=; b=rwHzjeAvvMujFODdzxy790zrJySuEeSrQzeN1CBZt7y2H/cLGZUMWMeD4MXAncT4Bd HkoyYOrepIzcis4m2A+azyt+2YkwzRO1q/IZUztvjoqpyWiiZeqQOGgmSwCJ6UCebYOE cmsV2tQuMm8/Ap6k04qY4mMayio2+lRf0a9nQgZm5kMNisCcv7FYTzeDExA3195p46oa pAE/j4TDzfRHGsvRlklmqlxDn7q+ghVrpD93RrpjFWb+6gmjdBaueB1GKSiCibRvl/sr 6uQSz64epIb0Obb/XNugaUTg8Rl1uCk2RRt/tsBqyePBTVU72ekZljBb/nn0DBEsKUa3 JBsw== X-Gm-Message-State: APf1xPDlWpy2lb+3lIQDKVV+4W9/okle+xGL5v/p4IOM4+uRxI25Lr3f i1evwtmosKcE/fafZfnFhyWhtJgb1iwZTsIV1f59Tw== X-Received: by 10.36.240.72 with SMTP id p8mr2446321iti.70.1519395763468; Fri, 23 Feb 2018 06:22:43 -0800 (PST) MIME-Version: 1.0 Received: by 10.79.230.25 with HTTP; Fri, 23 Feb 2018 06:22:42 -0800 (PST) In-Reply-To: <94a7bd07-8ad5-7ab1-20ab-a02fe2476efd@codeaurora.org> References: <20180126011400.2191-1-sboyd@codeaurora.org> <94a7bd07-8ad5-7ab1-20ab-a02fe2476efd@codeaurora.org> From: Linus Walleij Date: Fri, 23 Feb 2018 15:22:42 +0100 Message-ID: Subject: Re: [PATCH v2 0/3] Support qcom pinctrl protected pins To: Timur Tabi , Bjorn Andersson Cc: Stephen Boyd , "linux-kernel@vger.kernel.org" , linux-arm-msm@vger.kernel.org, Linux ARM , Andy Shevchenko , "open list:GPIO SUBSYSTEM" , Grant Likely , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 20, 2018 at 5:45 PM, Timur Tabi wrote: > On 01/25/2018 07:13 PM, Stephen Boyd wrote: >> >> This patchset proposes a solution to describing the valid >> pins for a pin controller in a semi-generic way so that qcom >> platforms can expose the pins that are really available. >> >> Typically, this has been done by having drivers and firmware >> descriptions only use pins they know they have access to, and that >> still works now because we no longer read the pin direction at >> boot. But there are still some userspace drivers and debugfs facilities >> that don't know what pins are available and attempt to read everything >> they can. On qcom platforms, this may lead to a system hang, which isn't >> very nice behavior, even if root is the only user that can trigger it. > > Any progress on this patch set? Stephen no longer works for Qualcomm, so I > don't know what the next step is, and I really want this feature in 4.17 > (we've missed so many merge windows already). I depend on Bjorn as maintainer of the pin control driver to ACK the solution he likes. Yours, Linus Walleij