Received: by 10.223.185.116 with SMTP id b49csp778622wrg; Fri, 23 Feb 2018 06:42:54 -0800 (PST) X-Google-Smtp-Source: AH8x226i1CZ/dlC35UbbUMd2CoXxl5tHgIQ2S1ipeHRzJ0FQJWN2rVUIiWcqcP+3ZpPWAsxS3Lqe X-Received: by 2002:a17:902:bb89:: with SMTP id m9-v6mr1922765pls.423.1519396973929; Fri, 23 Feb 2018 06:42:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519396973; cv=none; d=google.com; s=arc-20160816; b=cnlk+I6wgcRIXVlosyEipVHNY4xD45RYgce5vmTJurv3O7U4c4ENyvFZCh6EPN5X6+ ueDs/ITibTLAjlPHnK4tfmsrXboJqzWv4eK0Y/OktT7sK5LQk8VsiUgu4TJA9GQ+zmxY Mgj4srH39yHmpNu01xULS9LQhaJDpQzLcGkoHHDkIkde2Oj4sdo2BusknlqIL7vBJ/OO Ba+vYGmypCD25rYz5rQHVFtw05av2jdHJl4oXIuKUL+CYeDqc27HJYY/fAIuzaPHrwKs 9MDa9bUiXCmx/rvzIcUAy1qgkLziV02h8sxOMzzZdXQIabVDTzsh6N2N8SzjHKC+AX8J p9iw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=FEZr68/BOBSXudygDAt5EYq210JYtY9/SiFvT69yMkc=; b=FN9Wly/K3xWMH4citeX50VIS/ZFSDA/DQ9XS9OFGwfyw6h3RGkFXN2ScOKkJ3UEsk5 N4QTfujOxcRjtBnupn6RIvtRWsdDmVbrRVkLfZFJ+vIW0nFe4KyBIbIaQX4rwY5NwGaa bJ60ktVFG9ohhA2tbw3O9ZBl+FNARwZGFbEjK7mb4KSxwomo4Av8XUAnjtMHoXW5oBny dRK1FXDsmqyKTlh4AtwxM3IgAjU1Tu0l41oEbAScKV5QF0LW7zcrajgD2V7R00sDAj1A VhJEsjvrxZC5HsYuhUO8rc5bKBVR9kGFZ/jXK4kq+Sz/mVS5K7AgPSWfDgmAG3j2O8H/ XKtA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@monstr-eu.20150623.gappssmtp.com header.s=20150623 header.b=GXn97+df; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o4si1617431pgf.441.2018.02.23.06.42.39; Fri, 23 Feb 2018 06:42:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@monstr-eu.20150623.gappssmtp.com header.s=20150623 header.b=GXn97+df; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751818AbeBWOlb (ORCPT + 99 others); Fri, 23 Feb 2018 09:41:31 -0500 Received: from mail-wr0-f193.google.com ([209.85.128.193]:39968 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751628AbeBWOkl (ORCPT ); Fri, 23 Feb 2018 09:40:41 -0500 Received: by mail-wr0-f193.google.com with SMTP id o76so14343046wrb.7 for ; Fri, 23 Feb 2018 06:40:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=FEZr68/BOBSXudygDAt5EYq210JYtY9/SiFvT69yMkc=; b=GXn97+dfpuCTyMXhr4QwsvYtCLwVYst+ygfHiSieanxkajPFxObpHXqfJM1Abbmz4Z pg/sc2LlX5GKLuDIFJ6qLgjR0Eq5jZiuBc5bZCDIO/VV0BWyMpry+52706U3gVMQifNd 7g+/wndEdjhCqIG9wYstmNzWiwmkezHAxQJIwxYIVw9h68MaKmxs7Dda47eydukNz960 0b4JM5LqDPwQE01b2IJIENoA0d+pv/KnkYM+nI8VJSi+HE7ICMOl6qlTrzL92HAUkNiE BLb+2r0WLW8I9uHLPJ5TyGJvOng5OW8pus0ciYptDo1EdBRFiiJb0vJmkpZ+E7QlzI2W YS/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:in-reply-to:references; bh=FEZr68/BOBSXudygDAt5EYq210JYtY9/SiFvT69yMkc=; b=kwQ/4qm3ucNOEsXqD0yBYqjAlGowyQb/003Vqf6qH5txPG7sEBW5SnIxdZYBvXgVuM ET/MwyeTCl+Lckk9kYiUKpRGGAeZejUIn9sD846I6v+S/3EnQqlX5tO2kKsHRaj1eqj1 ji/zapxgW1lukhNlMVASLSJIm1q4RawgWtZMNiwwV8yhBxZnD2M0oJvz5+o5zei22smq q5H/64OMvZkGirmEWkO6OCrLMKehjpk2QFTtBC7bpPJ5GKoI3cwnSPYs3cXgfsy+rePd ZcB9H6tZjtnlw2VETWuSNXAPynS0LMI95hUiomm4e041qkS0qTvL+Me+3UOYyXslkysK SaHA== X-Gm-Message-State: APf1xPDoCWoVZjmEJ0m/O4Jr6BXv/vUhN9hM0YB7RjLB9uGwbLZQKUdn y9EizUic8amBim6PjG/41mTe+Q== X-Received: by 10.223.195.147 with SMTP id p19mr1974545wrf.224.1519396840244; Fri, 23 Feb 2018 06:40:40 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id c1sm2801574wrf.31.2018.02.23.06.40.39 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 23 Feb 2018 06:40:39 -0800 (PST) From: Michal Simek To: devicetree@vger.kernel.org Cc: monstr@monstr.eu, Masahiro Yamada , linux-kernel@vger.kernel.org, Arnd Bergmann , Will Deacon , Catalin Marinas , Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 5/8] arm64: zynqmp: Add support for Xilinx zcu106-revA Date: Fri, 23 Feb 2018 15:40:27 +0100 Message-Id: <0420ef0bc285ba335a3a60e3609614d8add36680.1519396753.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Xilinx zcu106 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek --- Changes in v2: - Remove i2c mw u-boot commands - Use i2c-mux instead of i2cswitch - Use clock generator without numbers - Record compatible string to xilinx.txt Documentation/devicetree/bindings/arm/xilinx.txt | 3 + arch/arm64/boot/dts/xilinx/Makefile | 1 + arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts | 2 +- arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts | 524 ++++++++++++++++++++++ 4 files changed, 529 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt b/Documentation/devicetree/bindings/arm/xilinx.txt index a9ce08a68711..8503fabf90ee 100644 --- a/Documentation/devicetree/bindings/arm/xilinx.txt +++ b/Documentation/devicetree/bindings/arm/xilinx.txt @@ -29,3 +29,6 @@ Additional compatible strings: - Xilinx evaluation board zcu104 "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104" + +- Xilinx evaluation board zcu106 + "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106" diff --git a/arch/arm64/boot/dts/xilinx/Makefile b/arch/arm64/boot/dts/xilinx/Makefile index 1c039e59c7c3..922c5da39600 100644 --- a/arch/arm64/boot/dts/xilinx/Makefile +++ b/arch/arm64/boot/dts/xilinx/Makefile @@ -5,3 +5,4 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts index 89d26f56514b..03f1dcebc83e 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts @@ -69,7 +69,7 @@ clock-frequency = <400000>; /* Another connection to this bus via PL i2c via PCA9306 - u45 */ - i2cswitch@74 { /* u34 */ + i2c-mux@74 { /* u34 */ compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts new file mode 100644 index 000000000000..230f9a459607 --- /dev/null +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts @@ -0,0 +1,524 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP ZCU106 + * + * (C) Copyright 2016, Xilinx, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk.dtsi" +#include +#include + +/ { + model = "ZynqMP ZCU106 RevA"; + compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem3; + gpio0 = &gpio; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &dcc; + usb0 = &usb0; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + sw19 { + label = "sw19"; + gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + linux,code = ; + gpio-key,wakeup; + autorepeat; + }; + }; + + leds { + compatible = "gpio-leds"; + heartbeat_led { + label = "heartbeat"; + gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&can1 { + status = "okay"; +}; + +&dcc { + status = "okay"; +}; + +/* fpd_dma clk 667MHz, lpd_dma 500MHz */ +&fpd_dma_chan1 { + status = "okay"; +}; + +&fpd_dma_chan2 { + status = "okay"; +}; + +&fpd_dma_chan3 { + status = "okay"; +}; + +&fpd_dma_chan4 { + status = "okay"; +}; + +&fpd_dma_chan5 { + status = "okay"; +}; + +&fpd_dma_chan6 { + status = "okay"; +}; + +&fpd_dma_chan7 { + status = "okay"; +}; + +&fpd_dma_chan8 { + status = "okay"; +}; + +&gem3 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + phy0: phy@c { + reg = <0xc>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + }; +}; + +&gpio { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + tca6416_u97: gpio@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + /* + * IRQ not connected + * Lines: + * 0 - SFP_SI5328_INT_ALM + * 1 - HDMI_SI5328_INT_ALM + * 5 - IIC_MUX_RESET_B + * 6 - GEM3_EXP_RESET_B + * 10 - FMC_HPC0_PRSNT_M2C_B + * 11 - FMC_HPC1_PRSNT_M2C_B + * 2-4, 7, 12-17 - not connected + */ + }; + + tca6416_u61: gpio@21 { + compatible = "ti,tca6416"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + /* + * IRQ not connected + * Lines: + * 0 - VCCPSPLL_EN + * 1 - MGTRAVCC_EN + * 2 - MGTRAVTT_EN + * 3 - VCCPSDDRPLL_EN + * 4 - MIO26_PMU_INPUT_LS + * 5 - PL_PMBUS_ALERT + * 6 - PS_PMBUS_ALERT + * 7 - MAXIM_PMBUS_ALERT + * 10 - PL_DDR4_VTERM_EN + * 11 - PL_DDR4_VPP_2V5_EN + * 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON + * 13 - PS_DIMM_SUSPEND_EN + * 14 - PS_DDR4_VTERM_EN + * 15 - PS_DDR4_VPP_2V5_EN + * 16 - 17 - not connected + */ + }; + + i2c-mux@75 { /* u60 */ + compatible = "nxp,pca9544"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* PS_PMBUS */ + ina226@40 { /* u76 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + ina226@41 { /* u77 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + ina226@42 { /* u78 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + ina226@43 { /* u87 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + ina226@44 { /* u85 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; + }; + ina226@45 { /* u86 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + ina226@46 { /* u93 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <5000>; + }; + ina226@47 { /* u88 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + ina226@4a { /* u15 */ + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <5000>; + }; + ina226@4b { /* u92 */ + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <5000>; + }; + }; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* PL_PMBUS */ + ina226@40 { /* u79 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <2000>; + }; + ina226@41 { /* u81 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + ina226@42 { /* u80 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + ina226@43 { /* u84 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + ina226@44 { /* u16 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; + }; + ina226@45 { /* u65 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + ina226@46 { /* u74 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <5000>; + }; + ina226@47 { /* u75 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* MAXIM_PMBUS - 00 */ + max15301@a { /* u46 */ + compatible = "maxim,max15301"; + reg = <0xa>; + }; + max15303@b { /* u4 */ + compatible = "maxim,max15303"; + reg = <0xb>; + }; + max15303@10 { /* u13 */ + compatible = "maxim,max15303"; + reg = <0x10>; + }; + max15301@13 { /* u47 */ + compatible = "maxim,max15301"; + reg = <0x13>; + }; + max15303@14 { /* u7 */ + compatible = "maxim,max15303"; + reg = <0x14>; + }; + max15303@15 { /* u6 */ + compatible = "maxim,max15303"; + reg = <0x15>; + }; + max15303@16 { /* u10 */ + compatible = "maxim,max15303"; + reg = <0x16>; + }; + max15303@17 { /* u9 */ + compatible = "maxim,max15303"; + reg = <0x17>; + }; + max15301@18 { /* u63 */ + compatible = "maxim,max15301"; + reg = <0x18>; + }; + max15303@1a { /* u49 */ + compatible = "maxim,max15303"; + reg = <0x1a>; + }; + max15303@1b { /* u8 */ + compatible = "maxim,max15303"; + reg = <0x1b>; + }; + max15303@1d { /* u18 */ + compatible = "maxim,max15303"; + reg = <0x1d>; + }; + + max20751@72 { /* u95 */ + compatible = "maxim,max20751"; + reg = <0x72>; + }; + max20751@73 { /* u96 */ + compatible = "maxim,max20751"; + reg = <0x73>; + }; + }; + /* Bus 3 is not connected */ + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + + /* PL i2c via PCA9306 - u45 */ + i2c-mux@74 { /* u34 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* + * IIC_EEPROM 1kB memory which uses 256B blocks + * where every block has different address. + * 0 - 256B address 0x54 + * 256B - 512B address 0x55 + * 512B - 768B address 0x56 + * 768B - 1024B address 0x57 + */ + eeprom: eeprom@54 { /* u23 */ + compatible = "atmel,24c08"; + reg = <0x54>; + }; + }; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + si5341: clock-generator@36 { /* SI5341 - u69 */ + reg = <0x36>; + }; + + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + si570_1: clock-generator@5d { /* USER SI570 - u42 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <300000000>; + clock-frequency = <300000000>; + }; + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; /* copy from zc702 */ + factory-fout = <156250000>; + clock-frequency = <148500000>; + }; + }; + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + si5328: clock-generator@69 {/* SI5328 - u20 */ + reg = <0x69>; + }; + }; + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; /* FAN controller */ + temp@4c {/* lm96163 - u128 */ + compatible = "national,lm96163"; + reg = <0x4c>; + }; + }; + /* 6 - 7 unconnected */ + }; + + i2c-mux@75 { + compatible = "nxp,pca9548"; /* u135 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* HPC0_IIC */ + }; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* HPC1_IIC */ + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* SYSMON */ + }; + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* DDR4 SODIMM */ + }; + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* SEP 3 */ + }; + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* SEP 2 */ + }; + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* SEP 1 */ + }; + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* SEP 0 */ + }; + }; +}; + +&rtc { + status = "okay"; +}; + +&sata { + status = "okay"; + /* SATA OOB timing settings */ + ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; + ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; + ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; + ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; + ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; + ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; + ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; +}; + +/* SD1 with level shifter */ +&sdhci1 { + status = "okay"; + no-1-8-v; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +/* ULPI SMSC USB3320 */ +&usb0 { + status = "okay"; +}; + +&watchdog0 { + status = "okay"; +}; -- 1.9.1