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[209.132.180.67]) by mx.google.com with ESMTP id c16si1640847pgv.729.2018.02.26.03.54.36; Mon, 26 Feb 2018 03:54:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752887AbeBZLxB (ORCPT + 99 others); Mon, 26 Feb 2018 06:53:01 -0500 Received: from mga06.intel.com ([134.134.136.31]:63953 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752289AbeBZLwx (ORCPT ); Mon, 26 Feb 2018 06:52:53 -0500 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Feb 2018 03:52:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.47,396,1515484800"; d="scan'208";a="37498120" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.157]) by orsmga002.jf.intel.com with SMTP; 26 Feb 2018 03:52:48 -0800 Received: by lahna (sSMTP sendmail emulation); Mon, 26 Feb 2018 13:52:47 +0200 Date: Mon, 26 Feb 2018 13:52:47 +0200 From: Mika Westerberg To: "Rafael J. Wysocki" Cc: Bjorn Helgaas , Linux PCI , Valdis Kletnieks , Mathias Nyman , Linux PM , "Rafael J. Wysocki" , Linux Kernel Mailing List , Lukas Wunner , Peter Wu , Qipeng Zha , Greg Kroah-Hartman , Andreas Noever , Dave Airlie , Qi Zheng Subject: Re: [PATCH v1 1/2] PCI: Add PCIe port runtime suspend details Message-ID: <20180226115247.GN27191@lahna.fi.intel.com> References: <151908155159.37696.9710083237704994886.stgit@bhelgaas-glaptop.roam.corp.google.com> <151908203999.37696.12678235610905422348.stgit@bhelgaas-glaptop.roam.corp.google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.9.1 (2017-09-22) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 20, 2018 at 10:31:51AM +0100, Rafael J. Wysocki wrote: > On Tue, Feb 20, 2018 at 12:14 AM, Bjorn Helgaas wrote: > > From: Bjorn Helgaas > > > > Add details about how we decide whether we can put a PCI bridge in D3. > > 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend") added this > > support to reduce power consumption on Intel Sunrise Point and Broxton > > platforms. > > > > In some cases we don't use D3 for bridges even when it should work, simply > > because it's impractical to test the configuration, or we tripped over some > > possible hardware issue on older platforms. Links to discussion of the > > PCIe port runtime power management patches, which includes mention of these > > issues, are below. > > > > No functional change. > > > > Link: v1: https://lkml.kernel.org/r/1456750566-116248-1-git-send-email-mika.westerberg@linux.intel.com > > Link: v2: https://lkml.kernel.org/r/1460111790-92836-1-git-send-email-mika.westerberg@linux.intel.com > > Link: v3: https://lkml.kernel.org/r/1460628268-16204-1-git-send-email-mika.westerberg@linux.intel.com > > Link: v4: https://lkml.kernel.org/r/1461578004-129094-1-git-send-email-mika.westerberg@linux.intel.com > > Link: v5: https://lkml.kernel.org/r/1461919919-120102-1-git-send-email-mika.westerberg@linux.intel.com > > Link: v6: https://lkml.kernel.org/r/1464855435-32960-1-git-send-email-mika.westerberg@linux.intel.com > > Link: https://lkml.kernel.org/r/2858019.9TUCWsDpTB@aspire.rjw.lan > > Signed-off-by: Bjorn Helgaas > > Reviewed-by: Rafael J. Wysocki Also Reviewed-by: Mika Westerberg