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[209.132.180.67]) by mx.google.com with ESMTP id j12si5442981pgn.115.2018.02.26.04.04.06; Mon, 26 Feb 2018 04:04:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=HxOzj4dL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752822AbeBZMCo (ORCPT + 99 others); Mon, 26 Feb 2018 07:02:44 -0500 Received: from mail-qk0-f195.google.com ([209.85.220.195]:33436 "EHLO mail-qk0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752597AbeBZMCm (ORCPT ); Mon, 26 Feb 2018 07:02:42 -0500 Received: by mail-qk0-f195.google.com with SMTP id f25so18700555qkm.0; Mon, 26 Feb 2018 04:02:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=q3KYGz20Z+0xroFRMDPUfbuKBVqA9Zn9/MbO5ZX8C4k=; b=HxOzj4dLxCnw+MyOH7ciqeD52/Hu2hkUnNNOHuMgju9n+vY27OP7fkOheRUZQcuNPR kOIvKSXptct8JyfoPStdqGXKBuyjPTqBdY+pfqAdcZv4nK6bwsw4i9iVo4gcivpdFbog JWFDwu4hOHxi/r6p/DOFo36GnvzhYkhqulzCNyk0QaA1omZmdUNIx+uupQWwkuJLoqzZ NekTDKEbRqp+XsG7Lgb6uFDNKub0+eKj9Tr1Lbr5xSz/8YimKUWp3FWhYX9cQmXNjwRb AIWb9DCBLbiU2a/NVtcKo3YcSbK3HvojTtttggTlkNqNMaYHvxxTbttKY0UVUBYpo3Ka GsmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=q3KYGz20Z+0xroFRMDPUfbuKBVqA9Zn9/MbO5ZX8C4k=; b=VilJNsXmZHNIabH9Modub1x4Sid6jD8T2DEyS+pXDBdzaU1xvDgQgDU9xwlbHu047Z lCPqxeGSIwCfgkGWMjXuUUytCJ6JfO6IJQv4nfiDPJkqi9tPmMgiDc6Wnz74AiseD3ul KZgEEnQVAs1X7a5GFv6dGK6/GBaTW1kJFfcvNFNFc1NabssRE5BHJ45JYvtiecxue5Ux NgZsFIIDFr5ES9HswyGSAtqKwllrvobNpL1CETk+8ua7nwOvnq4sReL4THiLdGvOyNI8 zm0yULmnSr0NETRGTsMRpO0gMMGdwDphg/97pCuNJ/wKpuDWcQpYyH8snjwwuO29LyKh E14g== X-Gm-Message-State: APf1xPCfMNWij6qFJosAdLVRb204bJtkMrWtBe3F6t1F/48uLAg+LPHK 79e4dmwp2gco/QKdelzy/Jq6M3NlT5UrCHdTCAo= X-Received: by 10.55.209.217 with SMTP id o86mr15679889qkl.33.1519646562140; Mon, 26 Feb 2018 04:02:42 -0800 (PST) MIME-Version: 1.0 Received: by 10.12.195.80 with HTTP; Mon, 26 Feb 2018 04:02:41 -0800 (PST) In-Reply-To: References: <334505d3a13a73ad347427b408ed581832434289.1519468782.git.baolin.wang@linaro.org> From: Andy Shevchenko Date: Mon, 26 Feb 2018 14:02:41 +0200 Message-ID: Subject: Re: [PATCH v2 3/3] gpio: Add Spreadtrum PMIC EIC driver support To: Baolin Wang Cc: Linus Walleij , Rob Herring , Mark Rutland , devicetree , Linux Kernel Mailing List , "open list:GPIO SUBSYSTEM" , Mark Brown Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Feb 26, 2018 at 5:01 AM, Baolin Wang wrote: > On 25 February 2018 at 20:19, Andy Shevchenko wrote: >> On Sat, Feb 24, 2018 at 12:44 PM, Baolin Wang wrote: >>> +static int sprd_pmic_eic_direction_input(struct gpio_chip *chip, >>> + unsigned int offset) >>> +{ >>> + /* EICs are always input, nothing need to do here. */ >>> + return 0; >>> +} >>> + >>> +static void sprd_pmic_eic_set(struct gpio_chip *chip, unsigned int offset, >>> + int value) >>> +{ >>> + /* EICs are always input, nothing need to do here. */ >>> +} >> >> Remove both. >> >> Look at what GPIO core does. > > I've checked the GPIO core, we need the > sprd_pmic_eic_direction_input() returns 0, since user can set GPIOD_IN > flag when requesting one GPIO, otherwise it will return errors. Right. I thought it depends on presence of direction_output(). > We also need one dummy sprd_pmic_eic_set() when setting debounce for > one GPIO, otherwise it will return errors. This is pretty much a "feature" of GPIO framework. It shouldn't require ->set() by logic if there is no output facility. OK. >>> + for (n = 0; n < chip->ngpio; n++) { >>> + if (!(BIT(n) & val)) >> >> for_each_set_bit(). >> >> At some point you may need just to go across lib/ in the kernel and >> see what we have there. > > I've considered the for_each_set_bit(), it need one 'unsigned long' > type parameter, but we get the value from regmap is 'u32' type. So we > need one extra conversion from 'u32' to 'unsigned long' like: > > unsigned long reg = val; > > for_each_set_bit(n, ®, chip->ngpio) { > ....... > } > > If you like this conversion, then I can change to use > for_each_set_bit(). Thanks. Wouldn't it work like unsigned long val; ...regmap_read(..., &val); ? -- With Best Regards, Andy Shevchenko