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[94.36.191.219]) by smtp.googlemail.com with ESMTPSA id n2sm7764467edl.74.2018.02.26.04.18.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 26 Feb 2018 04:18:08 -0800 (PST) Subject: Re: [PATCH] KVM: X86: Allow userspace to define the microcode version From: Paolo Bonzini To: Borislav Petkov Cc: Wanpeng Li , LKML , kvm , =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= References: <20180226094148.GA15539@pd.tnic> <20180226104921.GA4377@pd.tnic> <20180226111630.GB4377@pd.tnic> <20180226113000.GC4377@pd.tnic> <20180226114409.GD4377@pd.tnic> <46cecef2-b0fb-b0c2-bbf3-983328d52763@redhat.com> <20180226121509.GE4377@pd.tnic> <24cd527d-5287-f0be-ffe8-eab341bf1d94@redhat.com> Message-ID: <3866d359-0ef8-6a99-6254-84890be62b93@redhat.com> Date: Mon, 26 Feb 2018 13:18:07 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <24cd527d-5287-f0be-ffe8-eab341bf1d94@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 26/02/2018 13:16, Paolo Bonzini wrote: > On 26/02/2018 13:15, Borislav Petkov wrote: >> On Mon, Feb 26, 2018 at 12:54:52PM +0100, Paolo Bonzini wrote: >>> I don't understand how one thing follows from the other. How are writes >>> to 0x8B related to having a virtualized microcode loaded (which is a >>> concept that actually makes no sense at all)? >> >> I'm questioning the whole idea. 0x8b is the MSR which gives you the >> microcode revision. Most CPUs don't even allow writing to it, AFAICT. >> (SDM says "may prevent writing" on VM transitions.) >> >> So how is that host-initiated write to 0x8b is even going to work, in >> reality? kvm module writes the microcode version in there? How does the >> admin work around that? > > In this context, "host-initiated" write means written by KVM userspace > with ioctl(KVM_SET_MSR). It generally happens only on VM startup, reset > or live migration. To be clear, the target of the write is still the vCPU's emulated MSR. Paolo