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[209.132.180.67]) by mx.google.com with ESMTP id x10si6937092pfd.188.2018.02.26.07.46.21; Mon, 26 Feb 2018 07:46:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=XfrSr+Oy; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752081AbeBZPpR (ORCPT + 99 others); Mon, 26 Feb 2018 10:45:17 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:26047 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751544AbeBZPpP (ORCPT ); Mon, 26 Feb 2018 10:45:15 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1QFhSWf005378; Mon, 26 Feb 2018 09:43:28 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1519659808; bh=ROK8lg6ZITTM0XRH3eiBo5SeWlc1pwZxD2ziY2r1McA=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=XfrSr+OymFfTUL7ivQ5WGJk1ZyJEgGnb8dngyE/943KmZJPmbaN88G5DTDy7PTHpx TxYintAU5sGESs2a2DhujS0tn9aqA3osRgU8ssDWvagqOAgLQ6TICov1AcERNMLyYI 99C+/mew/zG/NQfnHVkGPMjknacVyMjaHADYCkd8= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1QFhSAO014907; Mon, 26 Feb 2018 09:43:28 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Mon, 26 Feb 2018 09:43:27 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Mon, 26 Feb 2018 09:43:27 -0600 Received: from [128.247.59.77] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1QFhRkq012782; Mon, 26 Feb 2018 09:43:27 -0600 Subject: Re: regression v4.16 on Nokia N900:/dev/input/event6 aka AV Jack support disappeared To: Pavel Machek , , , kernel list , linux-arm-kernel , , , , , , , , , , , , =?UTF-8?Q?Filip_Matijevi=c4=87?= CC: , , References: <20180224214617.GA22619@amd> From: "Andrew F. Davis" Message-ID: <052b4de7-5734-925b-7e0d-edf7abeefcfc@ti.com> Date: Mon, 26 Feb 2018 09:43:27 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <20180224214617.GA22619@amd> Content-Type: text/plain; charset="windows-1252" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/24/2018 03:46 PM, Pavel Machek wrote: > Hi! > > In v4.16, AV jack support disappeared. > > This one is suspect: > > commit 7be4b5dc7ffa9499ac6ef33a5ffa9ff43f9b7057 > Author: Andrew F. Davis > Date: Wed Nov 29 11:13:59 2017 -0600 > > ARM: dts: omap3-n900: Fix the audio CODEC's reset pin > > The correct DT property for specifying a GPIO used for reset > is "reset-gpios", fix this here. > > Fixes: 14e3e295b2b9 ("ARM: dts: omap3-n900: Add TLV320AIC3X > support") > > Signed-off-by: Andrew F. Davis > Signed-off-by: Tony Lindgren > > How was it tested? It reverts polarity of reset pin, but > sound/soc/codecs/tlv320aic3x.c treats those as aliases: > The polarity was wrong before, the AIC3x devices are active low reset and there is no logic inverters between the SoC and the reset line. GPIO_ACTIVE_LOW is therefor the correct polarity. This does not change the driver behavior as currently it uses the old gpio_set_value() which does not respect the polarity as set in DT. When this driver is converted to use gpiod_ style calls having the polarity correct will be important, and right now the old style gpio calls will cause this driver to fail to work if a board comes along that does have some logic inversion on the reset line as GPIO_ACTIVE is ignored. As Pavel points out I think your trouble is elsewhere. Andrew > ret = of_get_named_gpio(np, "reset-gpios", 0); > if (ret >= 0) { > aic3x->gpio_reset = ret; > } else { > ret = of_get_named_gpio(np, "gpio-reset", 0); > if (ret > 0) { > dev_warn(&i2c->dev, "Using deprecated property \"gpio-r\eset\", please update your DT"); > aic3x->gpio_reset = ret; > > > Pavel >