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[209.132.180.67]) by mx.google.com with ESMTP id bd7-v6si6943939plb.46.2018.02.26.09.27.23; Mon, 26 Feb 2018 09:27:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751686AbeBZR03 (ORCPT + 99 others); Mon, 26 Feb 2018 12:26:29 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53400 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750767AbeBZR02 (ORCPT ); Mon, 26 Feb 2018 12:26:28 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ADBB880D; Mon, 26 Feb 2018 09:26:27 -0800 (PST) Received: from e107981-ln.cambridge.arm.com (e107981-ln.cambridge.arm.com [10.1.207.54]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 56E283F24D; Mon, 26 Feb 2018 09:26:26 -0800 (PST) Date: Mon, 26 Feb 2018 17:26:18 +0000 From: Lorenzo Pieralisi To: Niklas Cassel Cc: kishon@ti.com, Arnd Bergmann , Greg Kroah-Hartman , Niklas Cassel , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/3] misc: pci_endpoint_test: Handle 64-bit BARs properly Message-ID: <20180226172618.GA26815@e107981-ln.cambridge.arm.com> References: <20180208123346.20784-1-niklas.cassel@axis.com> <20180208123346.20784-3-niklas.cassel@axis.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180208123346.20784-3-niklas.cassel@axis.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 08, 2018 at 01:33:45PM +0100, Niklas Cassel wrote: > A 64-bit BAR uses the succeeding BAR for the upper bits, > so we cannot simply call pci_ioremap_bar() on every single BAR. > > Ignore BARs that does not have a valid resource length. > > pci 0000:01:00.0: BAR 4: assigned [mem 0xc0300000-0xc031ffff 64bit] > pci 0000:01:00.0: BAR 2: assigned [mem 0xc0320000-0xc03203ff 64bit] > pci 0000:01:00.0: BAR 0: assigned [mem 0xc0320400-0xc03204ff 64bit] > pci-endpoint-test 0000:01:00.0: can't ioremap BAR 1: [??? 0x00000000 flags 0x0] > pci-endpoint-test 0000:01:00.0: failed to read BAR1 > pci-endpoint-test 0000:01:00.0: can't ioremap BAR 3: [??? 0x00000000 flags 0x0] > pci-endpoint-test 0000:01:00.0: failed to read BAR3 > pci-endpoint-test 0000:01:00.0: can't ioremap BAR 5: [??? 0x00000000 flags 0x0] > pci-endpoint-test 0000:01:00.0: failed to read BAR5 > > Signed-off-by: Niklas Cassel > --- > Lorenzo/Bjorn: pci_resource_len() seems to fix my problem, > but is it the correct function to use here? > If BAR[x] is a 64-bit BAR, I'm assuming that pci_resource_len() on BAR[x+1] > will always return 0 (since BAR[x+1] cannot have any prefetchable/type bits > when BAR[x] is 64-bit). > > drivers/misc/pci_endpoint_test.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c > index 320276f42653..3af31bfdcfdd 100644 > --- a/drivers/misc/pci_endpoint_test.c > +++ b/drivers/misc/pci_endpoint_test.c > @@ -534,6 +534,8 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev, > } > > for (bar = BAR_0; bar <= BAR_5; bar++) { > + if (pci_resource_len(pdev, bar) == 0) > + continue; Should not it be handled by checking the resource flags as you loop through the bar counter and incrementing the bar counter (+1) if IORESOURCE_MEM_64 is detected ? I would like to get Bjorn's point of view on this since it is definitely more comprehensive than mine. Thanks, Lorenzo > base = pci_ioremap_bar(pdev, bar); > if (!base) { > dev_err(dev, "failed to read BAR%d\n", bar); > -- > 2.14.2 >