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[209.132.180.67]) by mx.google.com with ESMTP id 124si7070415pgj.673.2018.02.27.06.44.31; Tue, 27 Feb 2018 06:44:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753896AbeB0Om2 (ORCPT + 99 others); Tue, 27 Feb 2018 09:42:28 -0500 Received: from lucky1.263xmail.com ([211.157.147.131]:48074 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753519AbeB0OmZ (ORCPT ); Tue, 27 Feb 2018 09:42:25 -0500 Received: from shawn.lin?rock-chips.com (unknown [192.168.167.105]) by lucky1.263xmail.com (Postfix) with ESMTP id D38D6969EB; Tue, 27 Feb 2018 22:42:06 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from [192.168.1.105] (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id B393B386; Tue, 27 Feb 2018 22:42:07 +0800 (CST) X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: linux-renesas-soc@vger.kernel.org X-SENDER-IP: 220.200.5.149 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: <654827600d1f4aa7673cc81978ce0988> X-ATTACHMENT-NUM: 0 X-SENDER: lintao@rock-chips.com X-DNS-TYPE: 0 Received: from [192.168.1.105] (unknown [220.200.5.149]) by smtp.263.net (Postfix) whith ESMTP id 31468W2G9LL; Tue, 27 Feb 2018 22:42:08 +0800 (CST) Cc: shawn.lin@rock-chips.com, Adrian Hunter , Michal Simek , Ulf Hansson , "linux-mmc@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-renesas-soc@vger.kernel.org" Subject: Re: [PATCH] mmc: sdhci-of-arasan: Add quirk to avoid erroneous msg To: Phil Edworthy References: <1519739731-27920-1-git-send-email-phil.edworthy@renesas.com> From: Shawn Lin Message-ID: Date: Tue, 27 Feb 2018 22:42:03 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=iso-2022-jp; format=flowed; delsp=yes Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2018/2/27 22:31, Phil Edworthy wrote: > Hi Shawn, > > On 27 February 2018 14:28, Shawn Lin wrote: >> 在 2018/2/27 21:55, Phil Edworthy 写道: >>> Since the controller does not support the end-of-busy IRQ, don't use it. >>> Otherwise, on older SD cards you will get lots of these messages: >>> "mmc0: Got data interrupt 0x00000002 even though no data operation was >> in progress" >>> >> >> I'm afraid you have to explain which version of arasan's IP suffer from this >> and what does the "older SD cards" mean? > Ok, I'll try to find out the IP version... > For "older SD cards", I can provide a list of a few cards that exhibit this problem > and others that don't, is that enough info? What I meant is could you elaborate more about what kind of cards, e.g, are them the legacy SDSC cards or SDHC cards, or maybe they are only running with defaut speed? or whatever, but not just with a vague "older" cards. :) > > Thanks > Phil > >>> This has been reported on Xilinx devices that also use the Arasan IP. >>> See https://patchwork.kernel.org/patch/8062871/ >>> >>> This has been tested on the Renesas RZ/ND-DB board with the RZ/N1 SoC. >>> >>> Signed-off-by: Phil Edworthy >>> --- >>> drivers/mmc/host/sdhci-of-arasan.c | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/mmc/host/sdhci-of-arasan.c >>> b/drivers/mmc/host/sdhci-of-arasan.c >>> index c33a5f7..ab66e32 100644 >>> --- a/drivers/mmc/host/sdhci-of-arasan.c >>> +++ b/drivers/mmc/host/sdhci-of-arasan.c >>> @@ -290,7 +290,8 @@ static const struct sdhci_pltfm_data >> sdhci_arasan_pdata = { >>> .ops = &sdhci_arasan_ops, >>> .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, >>> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | >>> - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, >>> + SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN | >>> + SDHCI_QUIRK2_STOP_WITH_TC, >>> }; >>> >>> static u32 sdhci_arasan_cqhci_irq(struct sdhci_host *host, u32 >>> intmask) >>> >> >> >> -- >> Best Regards >> Shawn Lin > > > > -- Best Regards Shawn Lin