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[209.132.180.67]) by mx.google.com with ESMTP id z8-v6si2455204plh.379.2018.02.27.10.36.21; Tue, 27 Feb 2018 10:36:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751845AbeB0Seo (ORCPT + 99 others); Tue, 27 Feb 2018 13:34:44 -0500 Received: from mx2.suse.de ([195.135.220.15]:54156 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751748AbeB0Sem (ORCPT ); Tue, 27 Feb 2018 13:34:42 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id BB26DAE48; Tue, 27 Feb 2018 18:34:40 +0000 (UTC) Date: Tue, 27 Feb 2018 19:34:17 +0100 From: Borislav Petkov To: "Ghannam, Yazen" Cc: "linux-efi@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "ard.biesheuvel@linaro.org" , "x86@kernel.org" Subject: Re: [PATCH v2 2/8] efi: Decode IA32/X64 Processor Error Section Message-ID: <20180227183417.GP26382@pd.tnic> References: <20180226193904.20532-1-Yazen.Ghannam@amd.com> <20180226193904.20532-3-Yazen.Ghannam@amd.com> <20180227112234.GE26382@pd.tnic> <20180227170034.GJ26382@pd.tnic> <20180227174446.GN26382@pd.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.9.3 (2018-01-21) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 27, 2018 at 06:06:21PM +0000, Ghannam, Yazen wrote: > It's not just about arches but record types. A single platform can report > using arch-specific records, memory records, PCIe records, etc. > > So all the other record types only show fields with a valid bit set and this > has always been the case. There may be users or tools who expect that > same behavior. You know we have this thing called tracepoints for that, don't you? You define one tracepoint which regurgitates an error record and then all arches which have the same table, share them. > Please see the other patches where these are decoded further. As I > mentioned the cover letter, the decoding is applied incrementally rather > than having one large patch. Here's what needs to go: All the validation bits crap: printk("%sValidation Bits: 0x%04x\n", pfx, validation_bits); Instead, you simply dump all entries unconditionally and say whether they're valid or not. This way you have the same format for each error record - much easier to work with. printk("%sCPUID Info:\n", pfx); print_hex_dump(pfx, "", DUMP_PREFIX_OFFSET, 16, 4, proc->cpuid, sizeof(proc->cpuid), 0); Frankly, I have no clue why we should even dump CPUID for *every* error. It is completely sufficient to dump family/model/stepping like we do in mce_amd.c. Besides, when debugging, you collect much more info from the system - CPUID only is not enough. printk("%sError Structure Type: %pUl\n", newpfx, &err_info->err_type); Unreadable GUIDs. What are those even: if (err_info->validation_bits & INFO_VALID_TARGET_ID) { printk("%sTarget Identifier: 0x%016llx\n", newpfx, err_info->target_id); } if (err_info->validation_bits & INFO_VALID_REQUESTOR_ID) { printk("%sRequestor Identifier: 0x%016llx\n", newpfx, err_info->requestor_id); } if (err_info->validation_bits & INFO_VALID_RESPONDER_ID) { printk("%sResponder Identifier: 0x%016llx\n", newpfx, err_info->responder_id); } some 8-byte ids? Who knows... Either remove them or make them human-readable, *explaining* what the requestor is and the target is and so on. printk("%sRegister Array Size: 0x%04x\n", newpfx, ctx_info->reg_arr_size); I have no clue what that is for. if (ctx_info->reg_ctx_type == CTX_TYPE_MSR) { groupsize = 8; /* MSRs are 8 bytes wide. */ printk("%sMSR Address: 0x%08x\n", newpfx, ctx_info->msr_addr); } What do I need the MSR *addresses* for? if (ctx_info->reg_ctx_type == CTX_TYPE_MMREG) { printk("%sMM Register Address: 0x%016llx\n", newpfx, ctx_info->mm_reg_addr); } memory mapped registers?!?! > Also, like I said in another thread, we should always print the raw value > followed by the decoding. That way the raw info is there in case a user > wants to send the data to the vendor or other expert party. By that logic we shouldn't be decoding at all - we should be dumping a fat hex blob. Again, there's this thing called tracepoints which have exactly that, you know. You can dump human readable info to dmesg and dump a whole raw record into the tracepoint. When the error is critical and we're about to die, the tracepoint contents goes to dmesg too. -- Regards/Gruss, Boris. SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg) --