Received: by 10.223.185.116 with SMTP id b49csp5469419wrg; Tue, 27 Feb 2018 14:01:32 -0800 (PST) X-Google-Smtp-Source: AG47ELvgac7egAacR0uyN/GW8eyrtmZ3RJZchQjK/ogLIQ+N0q0/zvLasMYbRFGZ/B6WTrusBPIu X-Received: by 2002:a17:902:aa89:: with SMTP id d9-v6mr10369752plr.337.1519768891920; Tue, 27 Feb 2018 14:01:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519768891; cv=none; d=google.com; s=arc-20160816; b=MF7ycrtrnF7u65PNXzPaajGdyBx/9VmCWxixVTWNJNavsh9pjJF9P6lM36bazuLID0 YTGBPrWnPYq71EkpZ4Vgicf+FRmNIlBsDqEWcoaB9Ey/2lvaxmC66bSnhJ7Rjp3JS1Bx zxBL9+9suDqPN+lMZSVoXwwyVChtNCL4EUr9VHw5Gfbu3d8PayoqSfKN82b+qeroKRcf HQuoWgnSzx33fQR/LKtxLan3mjsyMoclHSQO6lc8HB82v27+r3C5b7I/2/BnG+yMa4GH eVLHyovHtvDeVrVi3+7wAQX0/aAy8SIuHLeo2RuHf+RICIuQ6mSeVtpRJPuJGeVba7yY 8nww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject:dmarc-filter :dkim-signature:dkim-signature:arc-authentication-results; bh=0A3VSnmx7t+GufCoKCvHA+M0527KiXt4xb/PXq4/lV4=; b=Vgmw4F8W36xxiOPoj/w4dI2oN23OnVYsrfAmUxBS/9Ua94b3DKigNecTnwsf/qDMTY b9+XQDHTFbcXpyuvTletmCgr2aWHgC66PVY60Mr/VnIIW7bO9Te9TZqPW28gYfUMpetC N/nD3Ah1rs/gSnHlrVLAjYEYGl/x9xFo8JCb4Tg30KJaIZzuQqfCmGGee4RGAQBGvXml KjIm6B7Q1zgmH3eMcoucK4TebqEVRUHCuWl2+2mjZVPtCSHul1mw/97EUFXzlwge4hIc kiYMidYlsAreTJD7EUVXVgJD9Es9e15/7f6BZrkOLf6K7H29LVNzARBkn9wDW+c1Va0f g8/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=Ci4SKpHr; dkim=pass header.i=@codeaurora.org header.s=default header.b=L4xMI/nx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n3si69401pfi.302.2018.02.27.14.01.15; Tue, 27 Feb 2018 14:01:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=Ci4SKpHr; dkim=pass header.i=@codeaurora.org header.s=default header.b=L4xMI/nx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751836AbeB0WAL (ORCPT + 99 others); Tue, 27 Feb 2018 17:00:11 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:44922 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751455AbeB0WAJ (ORCPT ); Tue, 27 Feb 2018 17:00:09 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 175DC60390; Tue, 27 Feb 2018 22:00:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1519768809; bh=kbX3LzqEbnBuHqqh9w1OMscAFf3CdT5n3xQQyxIF/vY=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=Ci4SKpHrerCnDzOACUzULGfMUzBpsVGr/UVtAhd0EVgPVRe07TrVWwBrbIfCKZBnX HOF66bPJbUqAem96vOlMQv+DI7S/PEVX+7FXpa4a/PUUrModP5fB6xD4DeMGY8FiGP xhGfXV5rRvCastmG9ueaQGbk4SNRR3VdP39AbX2s= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from [10.226.60.117] (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: austinwc@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7E72260265; Tue, 27 Feb 2018 22:00:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1519768808; bh=kbX3LzqEbnBuHqqh9w1OMscAFf3CdT5n3xQQyxIF/vY=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=L4xMI/nxH2itYAGLA/HrD6NBl/wpeQ8uw5BgjdOjkcEEf1IPTip0zaKiK0Vnwz3zZ uT8pvRbX5QI/KQYRK1KckxjqxKPgL7+nMZyAKBwQRbWBk1gb2AVwqbuJTd0zPzQ1+a odNFKo2seCM1R2ol6MnWmtF33ZbK/OzbxSRNLgys= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7E72260265 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=austinwc@codeaurora.org Subject: Re: [PATCH 06/12] i2c: qup: proper error handling for i2c error in BAM mode To: Abhishek Sahu , Andy Gross , Wolfram Sang Cc: David Brown , Sricharan R , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org References: <1517644697-30806-1-git-send-email-absahu@codeaurora.org> <1517644697-30806-7-git-send-email-absahu@codeaurora.org> From: "Christ, Austin" Message-ID: <46d73045-be73-e95b-3aa6-6cfdab1d7278@codeaurora.org> Date: Tue, 27 Feb 2018 15:00:06 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <1517644697-30806-7-git-send-email-absahu@codeaurora.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Tested on Centriq 2400 Reviewed-by: Austin Christ On 2/3/2018 12:58 AM, Abhishek Sahu wrote: > Currently the i2c error handling in BAM mode is not working > properly in stress condition. > > 1. After an error, the FIFO are being written with FLUSH and > EOT tags which should not be required since already these tags > have been written in BAM descriptor itself. > > 2. QUP state is being moved to RESET in IRQ handler in case > of error. When QUP HW encounters an error in BAM mode then it > moves the QUP STATE to PAUSE state. In this case, I2C_FLUSH > command needs to be executed while moving to RUN_STATE by writing > to the QUP_STATE register with the I2C_FLUSH bit set to 1. > > 3. In Error case, sometimes, QUP generates more than one > interrupt which will trigger the complete again. After an error, > the flush operation will be scheduled after doing > reinit_completion which should be triggered by BAM IRQ callback. > If the second QUP IRQ comes during this time then it will call > the complete and the transfer function will assume the all the > BAM HW descriptors have been completed. > > 4. The release DMA is being called after each error which > will free the DMA tx and rx channels. The error like NACK is very > common in I2C transfer and every time this will be overhead. Now, > since the error handling is proper so this release channel can be > completely avoided. > > Signed-off-by: Abhishek Sahu > --- > drivers/i2c/busses/i2c-qup.c | 25 ++++++++++++++++--------- > 1 file changed, 16 insertions(+), 9 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c > index 094be6a..6227a5c 100644 > --- a/drivers/i2c/busses/i2c-qup.c > +++ b/drivers/i2c/busses/i2c-qup.c > @@ -228,9 +228,24 @@ static irqreturn_t qup_i2c_interrupt(int irq, void *dev) > if (bus_err) > writel(bus_err, qup->base + QUP_I2C_STATUS); > > + /* > + * Check for BAM mode and returns if already error has come for current > + * transfer. In Error case, sometimes, QUP generates more than one > + * interrupt. > + */ > + if (qup->use_dma && (qup->qup_err || qup->bus_err)) > + return IRQ_HANDLED; > + > /* Reset the QUP State in case of error */ > if (qup_err || bus_err) { > - writel(QUP_RESET_STATE, qup->base + QUP_STATE); > + /* > + * Don’t reset the QUP state in case of BAM mode. The BAM > + * flush operation needs to be scheduled in transfer function > + * which will clear the remaining schedule descriptors in BAM > + * HW FIFO and generates the BAM interrupt. > + */ > + if (!qup->use_dma) > + writel(QUP_RESET_STATE, qup->base + QUP_STATE); > goto done; > } > > @@ -841,20 +856,12 @@ static int qup_i2c_bam_do_xfer(struct qup_i2c_dev *qup, struct i2c_msg *msg, > goto desc_err; > } > > - if (rx_buf) > - writel(QUP_BAM_INPUT_EOT, > - qup->base + QUP_OUT_FIFO_BASE); > - > - writel(QUP_BAM_FLUSH_STOP, qup->base + QUP_OUT_FIFO_BASE); > - > qup_i2c_flush(qup); > > /* wait for remaining interrupts to occur */ > if (!wait_for_completion_timeout(&qup->xfer, HZ)) > dev_err(qup->dev, "flush timed out\n"); > > - qup_i2c_rel_dma(qup); > - > ret = (qup->bus_err & QUP_I2C_NACK_FLAG) ? -ENXIO : -EIO; > } > > -- Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.