Received: by 10.223.185.116 with SMTP id b49csp5644326wrg; Tue, 27 Feb 2018 17:56:58 -0800 (PST) X-Google-Smtp-Source: AH8x225+pEwxH4vP98vP9oURW6qCOHyn+enKO3i+sfMRVsGnH4wpkq3g3xuMhnth2mC02g9cBBNZ X-Received: by 10.98.20.22 with SMTP id 22mr15846137pfu.141.1519783018527; Tue, 27 Feb 2018 17:56:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519783018; cv=none; d=google.com; s=arc-20160816; b=aPf9MlUGjV2RTW6f4EmyUzHCa4Hlmd514RDiewp/rQgDM2Q3WFapUsNLbMmkh+v4PH mcd42VUkYU9NOQOHW2XbawtjMVzAh2jve1ustQmMmqHqzWSNT11U1OT9X2DWzN0WOndt BeYvQntCUWjwWGKW2KwAPM+GpTHGxLOu83mMxsKEWrh+o3iZp3/M7wlOjHKgcN8CDu2G eRC+N/xSDaAlD9H3R0T6UZP3zHXxBZu3y8nGikszYl59W66MWT3Dj19OK7gJm8wwJ6an M/GmV1hopmG1zLnmLbGZOu0URchHbKXDPetCdXA69kvXjZtpyq8+oGq42ES6Y0I9aAwJ h7hg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:in-reply-to :mime-version:user-agent:date:message-id:organization:from:cc :references:to:subject:arc-authentication-results; bh=s8n0HTXEE2c3PPuJMxAaEVw+0SVARtggHV6oskBHqSE=; b=L/XQgqOXMVhDtPAHYP/I77DDU/+pUWfQ8iwNCHyBzIk5dbvrLVtrpaZ+gf1UksCBkG hEGxlJB/90b0016mMMGuSEuDDWUgQFiFdqzbHCz7zFXa3jQRT0Woj/6ARwSPXP8SNdAG ncdu3oypKbc7QZqM1CU6rp1OhI7e2GiFL/CMX8P/bmsn41kBeVK3IXt8WCplOdo5krL4 WmIPmzPDIuD61C4WeaXD8CbtHP5gKCskQGSwym0R/DpDnZEhu68pChkGdMKwnKdOR3bO 016HWKJ3tBltr/XjwBb6q+bso2Y1Q3hEYJpzzfJMY1B8/Rh4chHcP/D2V3sls7VE73d1 uYsQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f35-v6si414110plh.107.2018.02.27.17.56.44; Tue, 27 Feb 2018 17:56:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751737AbeB1Bzo (ORCPT + 99 others); Tue, 27 Feb 2018 20:55:44 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:43402 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751521AbeB1Bzn (ORCPT ); Tue, 27 Feb 2018 20:55:43 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9BAAB1435; Tue, 27 Feb 2018 17:55:42 -0800 (PST) Received: from [192.168.3.112] (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 49F3E3F318; Tue, 27 Feb 2018 17:55:40 -0800 (PST) Subject: Re: [linux-sunxi] [PATCH v2 3/4] ARM: dts: add pwm status for r40. To: hao5781286@gmail.com, thierry.reding@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, maxime.ripard@free-electrons.com References: <20180225135225.GA14544@arx-s1> Cc: linux@armlinux.org.uk, Claudiu.Beznea@microchip.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linux-sunxi@googlegroups.com From: =?UTF-8?Q?Andr=c3=a9_Przywara?= Organization: ARM Ltd. Message-ID: <0fd023da-214a-c4ef-63f7-0cc41ca716bf@arm.com> Date: Wed, 28 Feb 2018 01:54:57 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20180225135225.GA14544@arx-s1> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, the subject line should mention the BananaPi M2 Ultra board. Otherwise this looks good, although I wonder if this should somehow mention "LCD-PWM" (in the commit message?), since this is how this pin is described in the BananaPi GPIO documentation for this board. And it seems to be dedicated for this purpose here. Cheers, Andre. On 25/02/18 13:52, hao_zhang wrote: > This patch adds pwm status for r40. > > Signed-off-by: hao_zhang > --- > arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts > index 8c5efe2..e4eb074 100644 > --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts > +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts > @@ -196,6 +196,12 @@ > status = "okay"; > }; > > +&pwm { > + pinctrl-names = "default"; > + pinctrl-0 = <&pwm_ch0_pin>; > + status = "okay"; > +}; > + > &uart0 { > pinctrl-names = "default"; > pinctrl-0 = <&uart0_pb_pins>; >