Received: by 10.223.185.116 with SMTP id b49csp6382453wrg; Wed, 28 Feb 2018 08:30:14 -0800 (PST) X-Google-Smtp-Source: AH8x226fSSD113pl/Bn0XznoS9Jd1g0vT9oDOM/5NHY6ZtjluBlQxXzgCin7ZkXjCAG6/Iyau1AP X-Received: by 2002:a17:902:24a5:: with SMTP id w34-v6mr18222770pla.221.1519835414267; Wed, 28 Feb 2018 08:30:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519835414; cv=none; d=google.com; s=arc-20160816; b=GagDeydNy4OvNpjbjNSzp5m3NZL4ajZu8xEltkp07qZV3MOPqSrhhUXVGsnEJVsFqD deaqWaMIBNMRHxYelqs2fzoYALABTGm1wAe5lvDU9QdZ1XGo+9VCBakYBl1JRmsReg0m KViXXQBeHHH5iyvjb/H7Vi6va8GPgV9reFDEyn+BoQ4f0nvtcbK22OIK/DWfmyAZBJra H07U7BXUXCN3wj6d6+SK2AUM5houqbdiY+/U1mZXNev9CpG2t/3VsS+qHtS0cEmQ6IAS epkbGGYpvp1z0yo6lgW+veUjyCtXwg9aPca1lQhBEN7R3rR1OigFZU2yiJWhPdCROXVz SESw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:subject:message-id:date:cc:to :from:mime-version:content-transfer-encoding:content-disposition :arc-authentication-results; bh=0/kbbz+Zcb4yLltlf2Zeyn0X9UHeC3wJ8eFo8o+ulS0=; b=nLYjZ3sfV6diK67+RC08a1IwgzbXrR25DNsUTDyIGsKDWNJtkaAXUxEz7U1t847JnI CMuwqz3v6iKVn0zsh/2i4E6KIFtBQN3sQqnRIWu78v24rexKJQoko3+/DmT1S3SqBymH 8VX8qTBXxy8CSRhVJmPpHNpAebYjeffLVlTaBZ3Ah77mcJ/O1ETukA6d7FwPDTnBkRaS fogsuo99YnrzRy6gAq7n0cJmr7zxaAoBsNfC5fxAuJA6VMMdMM0hyCkG6RLbdcjF0Djn 3aKD11xqcfE+YzR2szxMqL1hv4UGdRPk7oZFugyWYBi9sbl9O1SifoC5wJfHSBHDaPNW XF/Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d13si1207713pgn.366.2018.02.28.08.29.59; Wed, 28 Feb 2018 08:30:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934848AbeB1QPa (ORCPT + 99 others); Wed, 28 Feb 2018 11:15:30 -0500 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]:35179 "EHLO shadbolt.e.decadent.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934622AbeB1QP1 (ORCPT ); Wed, 28 Feb 2018 11:15:27 -0500 Received: from [2a02:8011:400e:2:6f00:88c8:c921:d332] (helo=deadeye) by shadbolt.decadent.org.uk with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.84_2) (envelope-from ) id 1er3Yt-0006Xi-HN; Wed, 28 Feb 2018 15:22:31 +0000 Received: from ben by deadeye with local (Exim 4.90_1) (envelope-from ) id 1er3Yg-0008Vu-1Q; Wed, 28 Feb 2018 15:22:18 +0000 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit MIME-Version: 1.0 From: Ben Hutchings To: linux-kernel@vger.kernel.org, stable@vger.kernel.org CC: akpm@linux-foundation.org, "Paolo Bonzini" , "Ralf Baechle" , "Paul Burton" , kvm@vger.kernel.org, "James Hogan" , "Gleb Natapov" , linux-mips@linux-mips.org Date: Wed, 28 Feb 2018 15:20:18 +0000 Message-ID: X-Mailer: LinuxStableQueue (scripts by bwh) Subject: [PATCH 3.16 093/254] MIPS: Clear [MSA]FPE CSR.Cause after notify_die() In-Reply-To: X-SA-Exim-Connect-IP: 2a02:8011:400e:2:6f00:88c8:c921:d332 X-SA-Exim-Mail-From: ben@decadent.org.uk X-SA-Exim-Scanned: No (on shadbolt.decadent.org.uk); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 3.16.55-rc1 review patch. If anyone has any objections, please let me know. ------------------ From: James Hogan commit 64bedffe496820dbb6b53302d80dd0f04db33d8e upstream. When handling floating point exceptions (FPEs) and MSA FPEs the Cause bits of the appropriate control and status register (FCSR for FPEs and MSACSR for MSA FPEs) are read and cleared before enabling interrupts, presumably so that it doesn't have to go through the pain of restoring those bits if the process is pre-empted, since writing those bits would cause another immediate exception while still in the kernel. The bits aren't normally ever restored again, since userland never expects to see them set. However for virtualisation it is necessary for the kernel to be able to restore these Cause bits, as the guest may have been interrupted in an FP exception handler but before it could read the Cause bits. This can be done by registering a die notifier, to get notified of the exception when such a value is restored, and if the PC was at the instruction which is used to restore the guest state, the handler can step over it and continue execution. The Cause bits can then remain set without causing further exceptions. For this to work safely a few changes are made: - __build_clear_fpe and __build_clear_msa_fpe no longer clear the Cause bits, and now return from exception level with interrupts disabled instead of enabled. - do_fpe() now clears the Cause bits and enables interrupts after notify_die() is called, so that the notifier can chose to return from exception without this happening. - do_msa_fpe() acts similarly, but now actually makes use of the second argument (msacsr) and calls notify_die() with the new DIE_MSAFP, allowing die notifiers to be informed of MSA FPEs too. Signed-off-by: James Hogan Acked-by: Ralf Baechle Cc: Paul Burton Cc: Paolo Bonzini Cc: Gleb Natapov Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Signed-off-by: Ben Hutchings --- arch/mips/include/asm/kdebug.h | 3 ++- arch/mips/kernel/genex.S | 14 ++++---------- arch/mips/kernel/traps.c | 16 +++++++++++++++- 3 files changed, 21 insertions(+), 12 deletions(-) --- a/arch/mips/include/asm/kdebug.h +++ b/arch/mips/include/asm/kdebug.h @@ -10,7 +10,8 @@ enum die_val { DIE_RI, DIE_PAGE_FAULT, DIE_BREAK, - DIE_SSTEPBP + DIE_SSTEPBP, + DIE_MSAFP }; #endif /* _ASM_MIPS_KDEBUG_H */ --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -360,21 +360,15 @@ NESTED(nmi_handler, PT_SIZE, sp) .set mips1 SET_HARDFLOAT cfc1 a1, fcr31 - li a2, ~(0x3f << 12) - and a2, a1 - ctc1 a2, fcr31 .set pop - TRACE_IRQS_ON - STI + CLI + TRACE_IRQS_OFF .endm .macro __build_clear_msa_fpe _cfcmsa a1, MSA_CSR - li a2, ~(0x3f << 12) - and a1, a1, a2 - _ctcmsa MSA_CSR, a1 - TRACE_IRQS_ON - STI + CLI + TRACE_IRQS_OFF .endm .macro __build_clear_ade --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -744,6 +744,11 @@ asmlinkage void do_fpe(struct pt_regs *r if (notify_die(DIE_FP, "FP exception", regs, 0, regs_to_trapnr(regs), SIGFPE) == NOTIFY_STOP) goto out; + + /* Clear FCSR.Cause before enabling interrupts */ + write_32bit_cp1_register(CP1_STATUS, fcr31 & ~FPU_CSR_ALL_X); + local_irq_enable(); + die_if_kernel("FP exception in kernel code", regs); if (fcr31 & FPU_CSR_UNI_X) { @@ -1295,13 +1300,22 @@ out: exception_exit(prev_state); } -asmlinkage void do_msa_fpe(struct pt_regs *regs) +asmlinkage void do_msa_fpe(struct pt_regs *regs, unsigned int msacsr) { enum ctx_state prev_state; prev_state = exception_enter(); + if (notify_die(DIE_MSAFP, "MSA FP exception", regs, 0, + regs_to_trapnr(regs), SIGFPE) == NOTIFY_STOP) + goto out; + + /* Clear MSACSR.Cause before enabling interrupts */ + write_msa_csr(msacsr & ~MSA_CSR_CAUSEF); + local_irq_enable(); + die_if_kernel("do_msa_fpe invoked from kernel context!", regs); force_sig(SIGFPE, current); +out: exception_exit(prev_state); }