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[209.132.180.67]) by mx.google.com with ESMTP id l4si1147332pgc.586.2018.02.28.09.19.45; Wed, 28 Feb 2018 09:20:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933487AbeB1Pr6 (ORCPT + 99 others); Wed, 28 Feb 2018 10:47:58 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:46821 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S933437AbeB1Prv (ORCPT ); Wed, 28 Feb 2018 10:47:51 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1SFhrbV029958; Wed, 28 Feb 2018 16:47:29 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2gaytj4v6x-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 28 Feb 2018 16:47:29 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6B31931; Wed, 28 Feb 2018 15:47:28 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4DD415008; Wed, 28 Feb 2018 15:47:28 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.361.1; Wed, 28 Feb 2018 16:47:28 +0100 Received: from lmecxl0923.lme.st.com (10.48.0.237) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Wed, 28 Feb 2018 16:47:27 +0100 From: Ludovic Barre To: Ulf Hansson , Rob Herring CC: Maxime Coquelin , Alexandre Torgue , Gerald Baeza , , , , , Ludovic Barre Subject: [PATCH V2 1/5] dt-bindings: mmc: document the stm32 sdmmc bindings Date: Wed, 28 Feb 2018 16:47:20 +0100 Message-ID: <1519832844-28068-2-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519832844-28068-1-git-send-email-ludovic.Barre@st.com> References: <1519832844-28068-1-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-02-28_08:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ludovic Barre Document the binding for stm32 sdmmc controller. Signed-off-by: Ludovic Barre --- .../devicetree/bindings/mmc/st,stm32-sdmmc.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/st,stm32-sdmmc.txt diff --git a/Documentation/devicetree/bindings/mmc/st,stm32-sdmmc.txt b/Documentation/devicetree/bindings/mmc/st,stm32-sdmmc.txt new file mode 100644 index 0000000..74d0bff --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/st,stm32-sdmmc.txt @@ -0,0 +1,35 @@ +* STMicroelectronics STM32 SDMMC controller + +The highspeed MMC host controller on STM32 soc family +provides an interface for MMC, SD and SDIO types of memory cards. + +This file documents differences between the core properties described +by mmc.txt and the properties used by the sdmmc driver. + +Required properties: + - compatible: Should be "st,stm32h7-sdmmc" + - reg: mmc controller base registers + - interrupts: Should contain the interrupt number + - clocks: Should contain phandle for the clock feeding the controller + - resets: Should contain phandle for the reset feeding the controller + +Optional property: +- st,dir-output-high: Allow to select direction polarity of external voltage + transceiver (which manage data and command direction). + if set: Voltage transceiver IOs are driven as output when direction signals are high, + else: Voltage transceiver IOs are driven as output when direction signals are low. +- st,neg-edge: generate data & command on sdmmc clock falling edge +- st,use-ckin: use sdmmc_ckin pin from an external driver to sample + the receive data (example: with voltage switch transceiver). + +Example: + sdmmc1: mmc@52007000 { + compatible = "st,stm32h7-sdmmc"; + reg = <0x52007000 0x1000>; + interrupts = <49>; + clocks = <&rcc SDMMC1_CK>; + resets = <&rcc SDMMC1_R>; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + }; -- 2.7.4