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[209.132.180.67]) by mx.google.com with ESMTP id r17si2207840pgo.179.2018.03.01.01.07.31; Thu, 01 Mar 2018 01:07:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CY1MD3as; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966659AbeCAJGp (ORCPT + 99 others); Thu, 1 Mar 2018 04:06:45 -0500 Received: from mail-io0-f182.google.com ([209.85.223.182]:34036 "EHLO mail-io0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966604AbeCAJGa (ORCPT ); Thu, 1 Mar 2018 04:06:30 -0500 Received: by mail-io0-f182.google.com with SMTP id e7so6388192ioj.1 for ; Thu, 01 Mar 2018 01:06:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=1DDyUg/+z5IZLDSFSC35+gHVK8VqGZ1DPwR/K2c0dZM=; b=CY1MD3asIpXvciqYTDORdd/4ACEAjoikTgl1TAYKz6hQBhqITo776GUzlYifpMop8l udIq0Y92tcwRa5TH0vRItmCPCsrEZ75krpmFF+aMF2YUPjmuznyZJmKd4xcecbZAk9RB TaXbEXZTqBa6c1RUWZoEpbU0DyPafxsNJzv/o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=1DDyUg/+z5IZLDSFSC35+gHVK8VqGZ1DPwR/K2c0dZM=; b=cXt6QlEAHg21EGr8pELeUhJqLcJchaCm2b/DQHQJOqfh0n9bnRBhaz8h0xoVcoKV1y HRkNz8tLscbdOSvISHupkj9nYe69btlw9i1pLjhe29p8Oz8tMZQ/AWnz/jpDYPWgPrdD pFP7pZz5px50z0b4dqwN6QRvjn5UCYkLfkQuD2JxPeNTFDjJV3UpuWgaXQ35vgIy97mi ktZs4+r3Z8akbM6gcOumwrFWF1+m+WHSCquei67AiqLXziTPSS4adoP5BxX1mvO4lgtf vvkDnEEBdAqShpY15J/X0CtoVvhi2xXat6DfU4f5dQFBy9jmD35AeGnCo7Nms8fMdB2A U7nQ== X-Gm-Message-State: APf1xPCmmL4XwjwisAFgj4edboHZr2l6AhgNtXADmDIVhdElAV4o0/TZ x6ZuZYAfFNIaAzpvzO0XLelLJ6hwZ2lnchr4l8KEGg== X-Received: by 10.107.153.79 with SMTP id b76mr1175362ioe.192.1519895189219; Thu, 01 Mar 2018 01:06:29 -0800 (PST) MIME-Version: 1.0 Received: by 10.2.91.10 with HTTP; Thu, 1 Mar 2018 01:06:28 -0800 (PST) In-Reply-To: <1519832844-28068-1-git-send-email-ludovic.Barre@st.com> References: <1519832844-28068-1-git-send-email-ludovic.Barre@st.com> From: Ulf Hansson Date: Thu, 1 Mar 2018 10:06:28 +0100 Message-ID: Subject: Re: [PATCH V2 0/5] mmc: add stm32 sdmmc controller To: Ludovic Barre Cc: Rob Herring , Maxime Coquelin , Alexandre Torgue , Gerald Baeza , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , devicetree@vger.kernel.org, "linux-mmc@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ludovic, On 28 February 2018 at 16:47, Ludovic Barre wrote: > From: Ludovic Barre > > This patch serie adds support of stm32 SDMMC controller. > stm32h7 is the first SoC to use stm32 SDMMC controller > (previous SoC had pl180 controller). I am a not convinced this isn't a new improved variant of the pl180. According to register layout and the code you submitted in patch2, there are great similarities to pl180 and the mmci driver. In other words, it more sounds like an improved variant of pl180, hence I am thinking that you should try to extend the mmci driver instead. Could you please have a look at that, unless you can specify more exactly why that isn't suitable? > > The SDMMC features include the following: > -Full compliance with MultiMediaCard System Specification Version 4.51. > Card support for three different databus modes: > 1-bit (default), 4-bit and 8-bit. > -Full compliance with SD memory card specifications version 4.1. > SDR104 speed limited to maximum allowed I/O speed, SPI mode and > UHS-II mode not supported. > -Full compliance with SDIO card specification version 4.0. > > change V2: > -dt-bindings: properties name > st,dir-output-high; st,neg-edge; st,use-ckin > -dt-bindings: node example s/sdmmc@/mmc@/g > -removes return of enable/disable_imask functions > -adds dev_warn if clk divisor is too short. > -replaces overprotection of n_elem by fail of dma_map_sg > -removes shortcut host->base > -Use device_property_present > > Ludovic Barre (5): > dt-bindings: mmc: document the stm32 sdmmc bindings > mmc: add stm32 sdmmc controller driver > ARM: dts: stm32: add sdmmc support for stm32h743 > ARM: dts: stm32: add sdmmc1 support for stm32h743i-eval > ARM: configs: stm32: add mmc and ext2/3/4 support > > .../devicetree/bindings/mmc/st,stm32-sdmmc.txt | 35 + > arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 26 + > arch/arm/boot/dts/stm32h743.dtsi | 26 + > arch/arm/boot/dts/stm32h743i-eval.dts | 11 + > arch/arm/configs/stm32_defconfig | 4 +- > drivers/mmc/host/Kconfig | 8 + > drivers/mmc/host/Makefile | 1 + > drivers/mmc/host/stm32-sdmmc.c | 708 +++++++++++++++++++++ > drivers/mmc/host/stm32-sdmmc.h | 220 +++++++ > 9 files changed, 1038 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/mmc/st,stm32-sdmmc.txt > create mode 100644 drivers/mmc/host/stm32-sdmmc.c > create mode 100644 drivers/mmc/host/stm32-sdmmc.h > > -- > 2.7.4 > Kind regards Uffe