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[209.132.180.67]) by mx.google.com with ESMTP id u15-v6si2929401plk.516.2018.03.01.02.38.09; Thu, 01 Mar 2018 02:38:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=Y3Uh61KP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S967261AbeCAKhF (ORCPT + 99 others); Thu, 1 Mar 2018 05:37:05 -0500 Received: from mail-qk0-f177.google.com ([209.85.220.177]:47045 "EHLO mail-qk0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965992AbeCAKhC (ORCPT ); Thu, 1 Mar 2018 05:37:02 -0500 Received: by mail-qk0-f177.google.com with SMTP id 130so6836951qkd.13; Thu, 01 Mar 2018 02:37:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=sNT0zXnXoZ+/XZ+Q91JzCECdDaMYwz7/t383fosmOCk=; b=Y3Uh61KPTaiPoNnzXbvBrUACXQU2BZvykgItgCa0e09ra37PGwlyVvZ9Ae+lRp58tZ 9DGYS4Fm7i1lDrFPpQW0HoiLQe0+tBTQBnYDSlmyLZlEW3TXAfAV/WliHQrAZ9L4aVCY qmaC2yaB/CWF/3aA1B8YpMHfPOgMWU4Rxg7oLsfSYDOuamCHa0WeNHFo+rOIIFV91rEs VTNrzHD+jgFB5zQh6FIyaPBHl4BxnBLHWDwI0wJp1q1OYcSWuJdOVx1RoOUZ5OS8JLGS 5dI421j4zgRldExNLK5yR9E/gnVt0HyClIzIT3gbQPwUOKdhTxuJ/4PvPKJX15YgGHnY lxIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=sNT0zXnXoZ+/XZ+Q91JzCECdDaMYwz7/t383fosmOCk=; b=Gv3kxe02XPJmTHqu14lKZvkqIkzg7nsN449aOGwdLsv/Vzp9RFmiJ4fO+XQkHyzHTS VFF1OtedDrckFbq4BQm0p3o1QoGOPzo423kSgIkIkiz77G8uP9IkGnUd7fV9K3I3L6Sv r8a56dZwP0QeMm1IX2dHDAzJRzbdWTvnw0frDrr4WATBh5HfU3YfEsP2NHnn314IShQs I8BV0Hjg/IdwTlHvUvyHrwxjSmiwj6MzuWfmGWWT5w5QmUsMEe1lPAtRQrAg1rTKOFns jsCVcV+IC45g8Bdem7R+6rPX14RQxom5OLGw5GR8khBgHqeITJUYKJiSp7U10QlsKYmz 89qw== X-Gm-Message-State: AElRT7Fqolj/diotrYuqJx1M3zRxhyISqLDbgdVMmMi1huLFEX3R7F3F TiuwJfnOg6TCCRRgVPwYaC3gXbRJASTcuHZkb2g= X-Received: by 10.55.2.193 with SMTP id v62mr1935644qkg.271.1519900621312; Thu, 01 Mar 2018 02:37:01 -0800 (PST) MIME-Version: 1.0 Received: by 10.200.47.219 with HTTP; Thu, 1 Mar 2018 02:37:00 -0800 (PST) In-Reply-To: References: <20180228111113.13639-1-jeffy.chen@rock-chips.com> <5A977638.8010506@rock-chips.com> From: Geert Uytterhoeven Date: Thu, 1 Mar 2018 11:37:00 +0100 X-Google-Sender-Auth: C7aLrygR7iDLOO-OTtexzXke_kE Message-ID: Subject: Re: [PATCH] soc: rockchip: power-domain: remove PM clocks To: Ulf Hansson Cc: JeffyChen , Tomasz Figa , Linux Kernel Mailing List , Dmitry Torokhov , Robin Murphy , Heiko Stuebner , Caesar Wang , Elaine Zhang , "open list:ARM/Rockchip SoC..." , Geert Uytterhoeven , Linux ARM , Linux PM Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ulf, On Thu, Mar 1, 2018 at 11:18 AM, Ulf Hansson wrote: > On 1 March 2018 at 09:33, Geert Uytterhoeven wrote: >> On Thu, Mar 1, 2018 at 4:40 AM, JeffyChen wrote: >>> 3/ make sure PM clk always be controlled(otherwise it might be unexpected >>> disabled by other clocks under the same clk parent?): >>> a) make sure Runtime PM is always enabled. and as discussed, we can select >>> PM in ARCH_ROCKCHIP > > I am fine enabling PM for ARCH_ROCKCHIP, if needed. > > However, what I don't agree with in general, is to make a generic > driver to rely on having CONFIG_PM to be set to be functional. That's > to me, bad practice. > > I understand, this approach exists in drivers today. I assume it > works, because those drivers are being used on SoCs which always has > CONFIG_PM set. I agree. This is mostly useful for drivers that are used on multiple SoCs, where the driver doesn't care about the clock (doesn't care about its properties), and where the clock is optional (i.e. either tied to an always-running bus clock, or to a controllable module clock, depending on SoC). The latter needs CONFIG_PM=y, but that's a platform property, controlled by selecting support for that specific SoC. >> On Renesas SoCs, we only add the device's module clock with pm_clk_add(). >> Drivers that don't care about properties of the module clock just call >> pm_runtime_*(). That way the same driver works on different SoCs using >> the same device, with and without power and/or clock domains. > > I understand your point and I accept your view. > > However, I think this is more a mindset of which way one want > implement things. This has been discussed several times in the mailing > list as well. > > Surely we can cope with SoC specific constraints in drivers as well, > we already do that. > > In principle I think this boils done to comparing a centralized > method, where the PM domain deals with clocks vs a decentralized > method, where the driver deals with clocks. Both works, both have > positive and negative consequences. Is the clock (are the clocks) used purely for power management of the device, or does it/do they serve another (independent) purpose? Note that unlike clocks, power areas cannot be controlled explicitly by the driver. That always has to be done through the Runtime PM API. > In my experience for ARM SoCs, I have found that centralized method > doesn't work well, when one need flexibility. For example, if there > are strict constraints on the order of how to put device's PM > resources (clocks, pinctrl, etc) in low power states. For example, to > avoid clock glitches. With multiple clocks used by a device, there's sometimes also a lack of understanding of the real clock hierarchy. If these multiple clocks need to be enabled/disabled in a specific order, perhaps they are not independent, and modelling the hierarchy correctly, and describing in DT the device as being connected to the leaf clock may solve the ordering issue. > Another problem with the PM clk is, more exactly with > pm_clk_suspend|resume(), that those invokes only clk_enable|disable(). > pm_clk_suspend|resume() can't call clk_prepare|unprepare(), because we > don't know if we running in atomic context when those are executed. > Potentially this means leaving the clocks ungated - all the time. > > I have though about how to fix the above, several times, but I always > ends up with thinking that's it more easy, to let the driver deal with > the clocks, as then the problem goes away. There's a similar issue with powering on/off power areas. How do device start/stop differ from power domain on/off? >> Drivers that care about properties of the module clock (mainly frequency) >> can still use the clk_*() API for that. Other (optional) clocks must be >> handled by the device driver itself. > > A comment on that; > > Before we the PM clk was introduced, we didn't have the clk_bulk_*() > interface. To me, using clk_bulk_*() in drivers could help to simplify > the code in regards to manage clocks (including SoC specific clocks) > during runtime PM. > > Perhaps this could be an option to using PM clk, as it provides both > flexibility and could manage SoC specific clocks. See my comment about multiple clocks above... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds