Received: by 10.223.185.116 with SMTP id b49csp7303390wrg; Thu, 1 Mar 2018 03:23:21 -0800 (PST) X-Google-Smtp-Source: AG47ELvySyhoWCCFOk68jRB48kGbPjKoOsVfDZTcPqJatdCwDetd6eT/rMj1RpRc3gtRYDpmK9p6 X-Received: by 2002:a17:902:7b95:: with SMTP id w21-v6mr1606063pll.35.1519903401070; Thu, 01 Mar 2018 03:23:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519903401; cv=none; d=google.com; s=arc-20160816; b=amnML4crd0l94aZO1s0/77MU9kFCUcB4HyiX2gUDlYRY53jYgRQLfM2iTn5O3hZmx4 pOxf7WoqHnElOVTkI5JbZ9OnlwxY5Ne9ptUw+yLTUSQy8W7ZGBqIh0lQPPvWyEiBjI8E Ub5j5OZbUUgjdhE3sEOStzS4327XBfMKYukQEKa/hARfXXoW2TbmUlSEmb9oDIcxHUXk k+fu6RtCUz5Yc3mYvTI1oNjU3M60iv2hahXJfSgtidKLqhA/kZZ3/48RrXEGbEdbzoCf GX1asSUkuJF+URx94rFNq4MOwkbW5JcvZDOyxOcSDGk1dYkbq6GiRctIRv7rgFpoGyWT wgMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature :arc-authentication-results; bh=jS2mepzGPrQsZGZWceqz2Cb8OBy6xGTMKE+DQ1ReuLU=; b=h55MpRcSqVqNrs2L47dBpRR3j7TViYpMVtIHdwH0mLiSYKN8oSgUwK6xYDfP8aRc9+ vbGAjliNFRLnNUGYihibiXVcxz8gev16QizbQ6DB8bjfwOBhUfCIYEVWlgxbFDTufhsS UehVqKHQDkfYKzjK9dE2lfhwtyugznAUnpunKdAN9s3/VjvcPlGloAu9NtB49ay3vyfA EQwUQ3xo0SKzyXk1yB/LFpJG2HWI7XuFXSi7NSUJSHnGZE4N4ZtnUkWtWqUBmp+2502o VXD8SlZjbAy2ehntqtjbyfXXrxzNRzXXbTFX4xNwMtZCQzaigWp1iQLm+s84UwWrrog+ 50SQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=a/iU8vFa; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p125si2329849pga.97.2018.03.01.03.23.05; Thu, 01 Mar 2018 03:23:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=a/iU8vFa; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030208AbeCALWX (ORCPT + 99 others); Thu, 1 Mar 2018 06:22:23 -0500 Received: from mail-it0-f47.google.com ([209.85.214.47]:55915 "EHLO mail-it0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S967726AbeCALWQ (ORCPT ); Thu, 1 Mar 2018 06:22:16 -0500 Received: by mail-it0-f47.google.com with SMTP id n7so7230787ita.5 for ; Thu, 01 Mar 2018 03:22:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=jS2mepzGPrQsZGZWceqz2Cb8OBy6xGTMKE+DQ1ReuLU=; b=a/iU8vFalBsRwsSMUnGlw4yT6vapk9NtefojdgdTO8cYnzaM62rb89f4yBcBhppuQi gPOEbQdtjY2if5yrY8le38jNKSVZv0K8uYwKNqMZCm57aIs6ABViBrU1gRFMQg7NVZgZ baExQNYDxY1LyjsjDeN1UCXzvMQGojbvykETo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=jS2mepzGPrQsZGZWceqz2Cb8OBy6xGTMKE+DQ1ReuLU=; b=KQL2qmIBQUdmnPbs0+it5ttD3fz0jhed+937IQ4hckv6dpZz3OyfZFsWT08ICSXR3I JIaQ7Azm0gvygThlonVN6TLJtvpUZ1PPkLWSmieGGXN88ZECkKBiJKQD4tk+gZa25Vrq JiJU1jVqn0ozRJ3KcGLq79wYfDka/mbWvBx1s6UhJ9bJeWR/EH6tsOCHrLds4gPtMXvA QIT/LJaeIB3eU/0ZHifq4eK2BGyKTNhiRO733DeQc4vMxYVDi0f/PNv9h8KNARY51hca RHbuYgEM9SoAVk29lke0VO0CH86sqeZCYqV3ZywOs3wHsYMtjzcLka0NmAIDSSQGJ4F4 Lvhg== X-Gm-Message-State: APf1xPARxdgGBoVEOpW6vbUa6HiKImIyaOY3nkghQdGP70wimzV3N5wf NOqD9ux884icYCvaaVW9/cdFYCtadq4r4SJmUnUQ4A== X-Received: by 10.36.213.212 with SMTP id a203mr2027072itg.86.1519903335133; Thu, 01 Mar 2018 03:22:15 -0800 (PST) MIME-Version: 1.0 Received: by 10.2.91.10 with HTTP; Thu, 1 Mar 2018 03:22:14 -0800 (PST) In-Reply-To: References: <20180228111113.13639-1-jeffy.chen@rock-chips.com> <5A977638.8010506@rock-chips.com> From: Ulf Hansson Date: Thu, 1 Mar 2018 12:22:14 +0100 Message-ID: Subject: Re: [PATCH] soc: rockchip: power-domain: remove PM clocks To: Geert Uytterhoeven Cc: JeffyChen , Tomasz Figa , Linux Kernel Mailing List , Dmitry Torokhov , Robin Murphy , Heiko Stuebner , Caesar Wang , Elaine Zhang , "open list:ARM/Rockchip SoC..." , Geert Uytterhoeven , Linux ARM , Linux PM Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1 March 2018 at 11:37, Geert Uytterhoeven wrote: > Hi Ulf, > > On Thu, Mar 1, 2018 at 11:18 AM, Ulf Hansson wrote: >> On 1 March 2018 at 09:33, Geert Uytterhoeven wrote: >>> On Thu, Mar 1, 2018 at 4:40 AM, JeffyChen wrote: >>>> 3/ make sure PM clk always be controlled(otherwise it might be unexpected >>>> disabled by other clocks under the same clk parent?): >>>> a) make sure Runtime PM is always enabled. and as discussed, we can select >>>> PM in ARCH_ROCKCHIP >> >> I am fine enabling PM for ARCH_ROCKCHIP, if needed. >> >> However, what I don't agree with in general, is to make a generic >> driver to rely on having CONFIG_PM to be set to be functional. That's >> to me, bad practice. >> >> I understand, this approach exists in drivers today. I assume it >> works, because those drivers are being used on SoCs which always has >> CONFIG_PM set. > > I agree. This is mostly useful for drivers that are used on multiple SoCs, > where the driver doesn't care about the clock (doesn't care about its > properties), and where the clock is optional (i.e. either tied to an > always-running bus clock, or to a controllable module clock, depending on SoC). > The latter needs CONFIG_PM=y, but that's a platform property, controlled > by selecting support for that specific SoC. > >>> On Renesas SoCs, we only add the device's module clock with pm_clk_add(). >>> Drivers that don't care about properties of the module clock just call >>> pm_runtime_*(). That way the same driver works on different SoCs using >>> the same device, with and without power and/or clock domains. >> >> I understand your point and I accept your view. >> >> However, I think this is more a mindset of which way one want >> implement things. This has been discussed several times in the mailing >> list as well. >> >> Surely we can cope with SoC specific constraints in drivers as well, >> we already do that. >> >> In principle I think this boils done to comparing a centralized >> method, where the PM domain deals with clocks vs a decentralized >> method, where the driver deals with clocks. Both works, both have >> positive and negative consequences. > > Is the clock (are the clocks) used purely for power management of the device, > or does it/do they serve another (independent) purpose? Well, I am not talking about one specific case. I guess what you are saying is that, devices may need different kind of clocks. Some can be power managed, some can't. That seems reasonable. In either way, the driver should be able to cope with both kinds of clocks. Right!? > > Note that unlike clocks, power areas cannot be controlled explicitly by the > driver. That always has to be done through the Runtime PM API. Yes, agree! At least until/if we get multiple power areas (PM domain) support for devices. Then this may change. However, that's a different story. :-) > >> In my experience for ARM SoCs, I have found that centralized method >> doesn't work well, when one need flexibility. For example, if there >> are strict constraints on the order of how to put device's PM >> resources (clocks, pinctrl, etc) in low power states. For example, to >> avoid clock glitches. > > With multiple clocks used by a device, there's sometimes also a lack of > understanding of the real clock hierarchy. If these multiple clocks need > to be enabled/disabled in a specific order, perhaps they are not > independent, and modelling the hierarchy correctly, and describing in DT > the device as being connected to the leaf clock may solve the ordering issue. Nope, this scenario I had in mind isn't about the clock hierarchy. Instead this is about other resources that the driver deals with during runtime PM. Pinctrl, regulators, device internals registers, etc. I have stumbled of cases, where the order dealing with these resources, simply need to be strict, thus it is better managed from the driver's runtime PM callbacks. What I am saying is that, if you have these kind of constraints, then having clocks being managed at the PM domain level via PM clk and other resources in the driver, simply isn't a good mix. > >> Another problem with the PM clk is, more exactly with >> pm_clk_suspend|resume(), that those invokes only clk_enable|disable(). >> pm_clk_suspend|resume() can't call clk_prepare|unprepare(), because we >> don't know if we running in atomic context when those are executed. >> Potentially this means leaving the clocks ungated - all the time. >> >> I have though about how to fix the above, several times, but I always >> ends up with thinking that's it more easy, to let the driver deal with >> the clocks, as then the problem goes away. > > There's a similar issue with powering on/off power areas. I don't follow. Can you elaborate? > How do device start/stop differ from power domain on/off? I guess what you refer to is that, genpd's ->start|stop() callbacks may be assigned to pm_clk_suspend|resume(), and those may be called from genps's runtime PM callbacks and genpd's system sleep callbacks. Yes, both cases suffers from the same problem as I describe above. Clocks may stay ungated - all the time. > >>> Drivers that care about properties of the module clock (mainly frequency) >>> can still use the clk_*() API for that. Other (optional) clocks must be >>> handled by the device driver itself. >> >> A comment on that; >> >> Before we the PM clk was introduced, we didn't have the clk_bulk_*() >> interface. To me, using clk_bulk_*() in drivers could help to simplify >> the code in regards to manage clocks (including SoC specific clocks) >> during runtime PM. >> >> Perhaps this could be an option to using PM clk, as it provides both >> flexibility and could manage SoC specific clocks. > > See my comment about multiple clocks above... > Kind regards Uffe