Received: by 10.223.185.116 with SMTP id b49csp7391403wrg; Thu, 1 Mar 2018 04:57:06 -0800 (PST) X-Google-Smtp-Source: AG47ELvmoCRTNj/D10EYqN0JgSbzL379mST76gqO5OkS8xRV9VW/YsTFsP+yqGgCFvuoqJuid/ge X-Received: by 2002:a17:902:1c5:: with SMTP id b63-v6mr1875877plb.311.1519909026202; Thu, 01 Mar 2018 04:57:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519909026; cv=none; d=google.com; s=arc-20160816; b=Gj0Pj1rRdonOLh3LTndzh08FkxWmpahbAzI10LS4WACn43Uj536frptibCTIzVxoYB +70sA+A+RRfQuduAU2yp+neNut2RU6hQfEDnk9a+W3qE2JbkznJGzpwVfM4FE1C3oefe hOa1KpM7UZmGuzVhatJ4dAP6kKUE6UNQx34KBLRP8CSqRRmMFPvW7wsWODV9/9s9v083 BPU1vfAiZCKHtKRWoeL3JXxaednnY8NJ4TrllZqRFnzmEggyHskIJ7yZfXZzQtPa5sP8 4hFEuH7uADvP4S4g2ROWf4U2r+wQSaNnWvoPiS/lIBQMfxJmG1WpiFOWtoSNyUPhAnz/ MVgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=Z+S2Ix53iGrX6+QKSywvcFw930P0kQ8cnUrXTnqGG/Q=; b=FjnjYyDMf3BvHFW0NvKHXeZ5VqxAsAKBZJoxIRDp3s0tsdFDIPA4Z/HmwedvntQYNf 2q6RZPt0bLxWz9m1tIniXIQdIKiHLFhrGW+idUe5G3rapo0n8KrJAcTqndrI61pRY1K0 S0YmBodOstvPUL6MT/cKXiQu0Pszeow47g2aBkDF92zSjInqKltmNNQWtFUPOknM0fTs NE74kxDkFC0uEt4lnG1Ee82GuSPGfsI9WdLVS0uccIsj0oSyhzYnWnarZQjZuMiATL7J tLPF3LM9Dudq1nDRRBO4r0axoCpE+9Hu9thWa5Yls3CDaoFUab7XNmEoW3wruZX3tVDv ecZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ShK26/14; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m13si2383531pgd.641.2018.03.01.04.56.51; Thu, 01 Mar 2018 04:57:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ShK26/14; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030658AbeCAMzv (ORCPT + 99 others); Thu, 1 Mar 2018 07:55:51 -0500 Received: from mail-pg0-f66.google.com ([74.125.83.66]:36399 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030568AbeCAMzt (ORCPT ); Thu, 1 Mar 2018 07:55:49 -0500 Received: by mail-pg0-f66.google.com with SMTP id i14so2275156pgv.3 for ; Thu, 01 Mar 2018 04:55:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Z+S2Ix53iGrX6+QKSywvcFw930P0kQ8cnUrXTnqGG/Q=; b=ShK26/14uqIuoViOIgA7OPZWMCiwrS8NzVQRQqVA0hTrpqL7TgadbWJc0gROeJjL2P 7gXYFtNVywedrgYOzQZxBWEbTl5WY4GpN7K3XQb1oRjeUD3buP0gP0ncR9yv8BfYnCuU Wvi+AZtMquWA1SpmDlevc4uirrSMQIwS/ZFc4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Z+S2Ix53iGrX6+QKSywvcFw930P0kQ8cnUrXTnqGG/Q=; b=ED2I5MpyT+tpkvwqSOHqExAyKRtqyiQXVXMKIlO/8jmhKibeN8mRybLIjXNQFfRuEp NKYx76AkaBMN3W4Ce3+HRkpUvHIbg4gNP66ZJcP1dWkFi0EeMUQfWU/o9R+8TZtyKbT/ Ee/F8tUA28g5OZ7ENRxotAeCEvKHRz5qg4Fdimrk7Z6uopHeU0m0I+8RL0VlupRFyN6C xpVBxnN67BWiIdWsv/Q8GUWNYRQruE4T4Te2eva6hGu1EFsLDvfGgVsrhkxp3YB8iTsz gOnyDvCwPUb46kZFN3Lk0eAJjZVo7xX1YnDdXhk/I+yYE4HF1nQ3okVNIFwOPywgnVyN gLQg== X-Gm-Message-State: APf1xPAy+jXMf1HutRyQLgP9ZPte2S6q9EsVg6PXwe+/67Dmt5oRinxe Dz/KtdABNU/im+iShZw7GbcEhw== X-Received: by 10.167.128.194 with SMTP id a2mr1890596pfn.186.1519908948929; Thu, 01 Mar 2018 04:55:48 -0800 (PST) Received: from localhost.localdomain (176.122.172.82.16clouds.com. [176.122.172.82]) by smtp.gmail.com with ESMTPSA id x4sm2289655pfb.46.2018.03.01.04.55.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 01 Mar 2018 04:55:48 -0800 (PST) From: Alex Shi To: Marc Zyngier , Will Deacon , Ard Biesheuvel , Catalin Marinas , stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Yury Norov , Laura Abbott , James Morse , Alex Shi Subject: [PATCH 05/45] arm64: move TASK_* definitions to Date: Thu, 1 Mar 2018 20:53:42 +0800 Message-Id: <1519908862-11425-6-git-send-email-alex.shi@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519908862-11425-1-git-send-email-alex.shi@linaro.org> References: <1519908862-11425-1-git-send-email-alex.shi@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yury Norov commit eef94a3d09aab upstream. ILP32 series [1] introduces the dependency on for TASK_SIZE macro. Which in turn requires , and include , giving a circular dependency, because TASK_SIZE is currently located in . In other architectures, TASK_SIZE is defined in , and moving TASK_SIZE there fixes the problem. Discussion: https://patchwork.kernel.org/patch/9929107/ [1] https://github.com/norov/linux/tree/ilp32-next CC: Will Deacon CC: Laura Abbott Cc: Ard Biesheuvel Cc: Catalin Marinas Cc: James Morse Suggested-by: Mark Rutland Signed-off-by: Yury Norov Signed-off-by: Will Deacon Signed-off-by: Alex Shi --- arch/arm64/include/asm/memory.h | 15 --------------- arch/arm64/include/asm/processor.h | 21 +++++++++++++++++++++ arch/arm64/kernel/entry.S | 2 +- 3 files changed, 22 insertions(+), 16 deletions(-) diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h index 53211a0..269b979 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -60,8 +60,6 @@ * KIMAGE_VADDR - the virtual address of the start of the kernel image * VA_BITS - the maximum number of bits for virtual addresses. * VA_START - the first kernel virtual address. - * TASK_SIZE - the maximum size of a user space task. - * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area. */ #define VA_BITS (CONFIG_ARM64_VA_BITS) #define VA_START (UL(0xffffffffffffffff) << VA_BITS) @@ -74,19 +72,6 @@ #define PCI_IO_END (VMEMMAP_START - SZ_2M) #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE) #define FIXADDR_TOP (PCI_IO_START - SZ_2M) -#define TASK_SIZE_64 (UL(1) << VA_BITS) - -#ifdef CONFIG_COMPAT -#define TASK_SIZE_32 UL(0x100000000) -#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ - TASK_SIZE_32 : TASK_SIZE_64) -#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \ - TASK_SIZE_32 : TASK_SIZE_64) -#else -#define TASK_SIZE TASK_SIZE_64 -#endif /* CONFIG_COMPAT */ - -#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4)) #define KERNEL_START _text #define KERNEL_END _end diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index 60e3482..4258f4d 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -19,6 +19,10 @@ #ifndef __ASM_PROCESSOR_H #define __ASM_PROCESSOR_H +#define TASK_SIZE_64 (UL(1) << VA_BITS) + +#ifndef __ASSEMBLY__ + /* * Default implementation of macro that returns current * instruction pointer ("program counter"). @@ -37,6 +41,22 @@ #include #include +/* + * TASK_SIZE - the maximum size of a user space task. + * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area. + */ +#ifdef CONFIG_COMPAT +#define TASK_SIZE_32 UL(0x100000000) +#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ + TASK_SIZE_32 : TASK_SIZE_64) +#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \ + TASK_SIZE_32 : TASK_SIZE_64) +#else +#define TASK_SIZE TASK_SIZE_64 +#endif /* CONFIG_COMPAT */ + +#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4)) + #define STACK_TOP_MAX TASK_SIZE_64 #ifdef CONFIG_COMPAT #define AARCH32_VECTORS_BASE 0xffff0000 @@ -192,4 +212,5 @@ int cpu_enable_pan(void *__unused); int cpu_enable_uao(void *__unused); int cpu_enable_cache_maint_trap(void *__unused); +#endif /* __ASSEMBLY__ */ #endif /* __ASM_PROCESSOR_H */ diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index b4c7db4..478f0fe 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include -- 2.7.4