Received: by 10.223.185.116 with SMTP id b49csp7396181wrg; Thu, 1 Mar 2018 05:01:40 -0800 (PST) X-Google-Smtp-Source: AG47ELsUsyL7j1fxL8gl6Osp8SQSrpIck+ezRdBf01jg+CvRyCCUg8tXPjdlZSSPNiV1udc4f+Em X-Received: by 10.98.220.80 with SMTP id t77mr1872378pfg.55.1519909300799; Thu, 01 Mar 2018 05:01:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519909300; cv=none; d=google.com; s=arc-20160816; b=zfHg4WF5S1VuZ2Swlc3OJq61/zrhHQpSl6/ZWVSyWp0tcvFeueLdYCehONa48jmO4q ywwzBRBHbE9Q4wQYaSdKOwS4KPvSgal2g4kUwEhPfv3YVLohoFlOPTl+WIkIEe7MALNb ATjQc5knutHyGBoqyQkP4g6x0mX2Y3iFIFdGLf1w3nxl2IJ7EtRQNMTy3oJ3AZsS5EJC ius4m8PTnIZtL3VMeg81yXBaaQRUliAyeQlgFFbfTlid/U5r7WgHIq78KaNx7cBSo7im jRe0uHYWI+G4Euoin27roV5YPkolbASMDxL9vEv490sK2uieFXCLjdLw8ix2IISZ7aPc jW7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=zjBJQZwCtp0hGrc4gv51u2xDzBZtNutKZ6u7sQOebOs=; b=p7C7pmTu+eCVVdmsJ2kwR7ISsiG6GsakZg6WEQadoSQjONonts6MGZodfgh6YoEFCk AXZhvad5cgT7f976/qd3f9WFcltjThULNDbVZlZsQJ+Ngtfavx5lCb53Cz+zKc/asbTs 2YdZimY5TomtK0k9UPC+JpoVTi9Bpp6i9Sx0hr1UDHWqaHnKYqr1bBv568gGTiDReNxc ojoMjFgQ0VQO/7qFwKwleJjxJJ9YQHiu0DlnQs6fMdLf31jXOFBZYBEJpGiK9YJOvV6J QkWsYRB754GfU5sa65Wo/+N/GVspNaCH6YXS24ia3UlUkr5VGZSZ2TvOpFmKOc7kEwkw fAeg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W122qInO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d67si2974589pfe.49.2018.03.01.05.01.13; Thu, 01 Mar 2018 05:01:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W122qInO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031050AbeCAM74 (ORCPT + 99 others); Thu, 1 Mar 2018 07:59:56 -0500 Received: from mail-pg0-f68.google.com ([74.125.83.68]:45813 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030735AbeCAM7u (ORCPT ); Thu, 1 Mar 2018 07:59:50 -0500 Received: by mail-pg0-f68.google.com with SMTP id i133so2262838pgc.12 for ; Thu, 01 Mar 2018 04:59:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zjBJQZwCtp0hGrc4gv51u2xDzBZtNutKZ6u7sQOebOs=; b=W122qInOewbxULPjXppE61Y/kDXlxlINb5unjLfvhaH+XUQPlG50QSKlZOnJ++2xYg Wsqs/oDBvfGq15vp/k4DdqYP8J2xuixyt/JaIJcKokP9NAuNa+KeB7g+Smb0TutdY7Dx XKeF+fF3EUoK5yMxj4APpcY0PBwdyIyHPBiXo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zjBJQZwCtp0hGrc4gv51u2xDzBZtNutKZ6u7sQOebOs=; b=fkJoRr1lGhYSLE9AK5ywZpfXN3SeVPkP/CT4VAm505G7LPzGRgrsR+1xayg3w0uYF8 46gN3Tlm0Q3fAsdaWKFIWCBFstVmnXE7fl4ne1J/l6r6WI8e4yfdvE6LDX4V5zdbP4Tn POCYedh13cCEZ+5LFHp5raTSdjWPqqOyzVcE/PWS5PsALJl07ys3MHOBq2AADVk2HHwO v8CJoPOpkw76I5nPwt/77sedXyY80xAuQ3XnpcaMnwrR5mo1mN99P4pj1tVb0n/Yg5OD Kj1G2EV7ipmyql4fqO8hZTol74+wq4XuR3t3h+kUS/8fwIynitP69UeUihFC3MUT8Qan pSrA== X-Gm-Message-State: APf1xPDwGIGNHs0LHqLezLG3Ao6o/AWaj6PBL9jx9204U+CZzbdkWx9y btiqTMgzmGjqtQ0B0Bv5KhguGA== X-Received: by 10.101.87.199 with SMTP id q7mr1497712pgr.215.1519909189841; Thu, 01 Mar 2018 04:59:49 -0800 (PST) Received: from localhost.localdomain (176.122.172.82.16clouds.com. [176.122.172.82]) by smtp.gmail.com with ESMTPSA id x4sm2289655pfb.46.2018.03.01.04.59.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 01 Mar 2018 04:59:49 -0800 (PST) From: Alex Shi To: Marc Zyngier , Will Deacon , Ard Biesheuvel , Catalin Marinas , stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Alex Shi Subject: [PATCH 33/45] arm/arm64: KVM: Add smccc accessors to PSCI code Date: Thu, 1 Mar 2018 20:54:10 +0800 Message-Id: <1519908862-11425-34-git-send-email-alex.shi@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519908862-11425-1-git-send-email-alex.shi@linaro.org> References: <1519908862-11425-1-git-send-email-alex.shi@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marc Zyngier commit 84684fecd7ea upstream. Instead of open coding the accesses to the various registers, let's add explicit SMCCC accessors. Reviewed-by: Christoffer Dall Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier Signed-off-by: Catalin Marinas Signed-off-by: Will Deacon Signed-off-by: Alex Shi --- arch/arm/kvm/psci.c | 52 ++++++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 42 insertions(+), 10 deletions(-) diff --git a/arch/arm/kvm/psci.c b/arch/arm/kvm/psci.c index 4adfa28..bc334d6 100644 --- a/arch/arm/kvm/psci.c +++ b/arch/arm/kvm/psci.c @@ -33,6 +33,38 @@ #define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1) +static u32 smccc_get_function(struct kvm_vcpu *vcpu) +{ + return vcpu_get_reg(vcpu, 0); +} + +static unsigned long smccc_get_arg1(struct kvm_vcpu *vcpu) +{ + return vcpu_get_reg(vcpu, 1); +} + +static unsigned long smccc_get_arg2(struct kvm_vcpu *vcpu) +{ + return vcpu_get_reg(vcpu, 2); +} + +static unsigned long smccc_get_arg3(struct kvm_vcpu *vcpu) +{ + return vcpu_get_reg(vcpu, 3); +} + +static void smccc_set_retval(struct kvm_vcpu *vcpu, + unsigned long a0, + unsigned long a1, + unsigned long a2, + unsigned long a3) +{ + vcpu_set_reg(vcpu, 0, a0); + vcpu_set_reg(vcpu, 1, a1); + vcpu_set_reg(vcpu, 2, a2); + vcpu_set_reg(vcpu, 3, a3); +} + static unsigned long psci_affinity_mask(unsigned long affinity_level) { if (affinity_level <= 3) @@ -75,7 +107,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) unsigned long context_id; phys_addr_t target_pc; - cpu_id = vcpu_get_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK; + cpu_id = smccc_get_arg1(source_vcpu) & MPIDR_HWID_BITMASK; if (vcpu_mode_is_32bit(source_vcpu)) cpu_id &= ~((u32) 0); @@ -94,8 +126,8 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) return PSCI_RET_INVALID_PARAMS; } - target_pc = vcpu_get_reg(source_vcpu, 2); - context_id = vcpu_get_reg(source_vcpu, 3); + target_pc = smccc_get_arg2(source_vcpu); + context_id = smccc_get_arg3(source_vcpu); kvm_reset_vcpu(vcpu); @@ -114,7 +146,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) * NOTE: We always update r0 (or x0) because for PSCI v0.1 * the general puspose registers are undefined upon CPU_ON. */ - vcpu_set_reg(vcpu, 0, context_id); + smccc_set_retval(vcpu, context_id, 0, 0, 0); vcpu->arch.power_off = false; smp_mb(); /* Make sure the above is visible */ @@ -134,8 +166,8 @@ static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu) struct kvm *kvm = vcpu->kvm; struct kvm_vcpu *tmp; - target_affinity = vcpu_get_reg(vcpu, 1); - lowest_affinity_level = vcpu_get_reg(vcpu, 2); + target_affinity = smccc_get_arg1(vcpu); + lowest_affinity_level = smccc_get_arg2(vcpu); /* Determine target affinity mask */ target_affinity_mask = psci_affinity_mask(lowest_affinity_level); @@ -209,7 +241,7 @@ int kvm_psci_version(struct kvm_vcpu *vcpu) static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) { struct kvm *kvm = vcpu->kvm; - unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0); + u32 psci_fn = smccc_get_function(vcpu); unsigned long val; int ret = 1; @@ -276,14 +308,14 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) break; } - vcpu_set_reg(vcpu, 0, val); + smccc_set_retval(vcpu, val, 0, 0, 0); return ret; } static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu) { struct kvm *kvm = vcpu->kvm; - unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0); + u32 psci_fn = smccc_get_function(vcpu); unsigned long val; switch (psci_fn) { @@ -301,7 +333,7 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu) break; } - vcpu_set_reg(vcpu, 0, val); + smccc_set_retval(vcpu, val, 0, 0, 0); return 1; } -- 2.7.4