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[209.132.180.67]) by mx.google.com with ESMTP id n11-v6si3026575pls.727.2018.03.01.06.09.56; Thu, 01 Mar 2018 06:10:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bBayrF96; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031168AbeCAOJD (ORCPT + 99 others); Thu, 1 Mar 2018 09:09:03 -0500 Received: from mail-qk0-f193.google.com ([209.85.220.193]:36663 "EHLO mail-qk0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030992AbeCAOJC (ORCPT ); Thu, 1 Mar 2018 09:09:02 -0500 Received: by mail-qk0-f193.google.com with SMTP id d206so7632557qkb.3 for ; Thu, 01 Mar 2018 06:09:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=LOORO+o0TozJX8x/1Owd31Osld0aSMIweJ5MDK5BeFA=; b=bBayrF96+26kbjafbh0LKkwmKFZCJJqAOL4JQl18uoJOURTROr5UeMBZBj/RJIj3XL 7S10otbo/tsPagvWlIow/48hLs/lcJRNdX+XXRqSvnGKM+49oV4vieJzEdSdgsc7b9ZL lkqutevfARdM8ZM1Ao7Aup6qU0783cIBA5JyU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=LOORO+o0TozJX8x/1Owd31Osld0aSMIweJ5MDK5BeFA=; b=WepU0//axXDTJKSNBBuY4bILbF4QXDLlNnmezQrfLaj4kpv/HbVVKi/nO4JllO306B seegkFA7oWlDxPv7K92XBaotmS83p6IdZgPutOwRQtYyEmTfZqwoxjdM5SH2qhP0fZse 94F/KvgaytR5iAoU0yQ7aMi0GykHG97ZAiDRda93dI7P2nc3oOCGPVDpimFlm1OvLAam gOJpVDgFp38dioGeCOT6mA89gkrnOIiBukgPfg0+6BsxG+dHBQdlBYE4on+Y11XC4CkQ fiPKv3+z5Nlt0Pv75olaDOGh0JkBIj4uP018cguNQooE4lLUTPmoKQMt1KiGw/jj0UIe O2ZA== X-Gm-Message-State: AElRT7EdT3dfuGMTgmLqPbbNqTmt/YOYE5Sjxr/Pe7QX7U+vsxnTP1du G/AmCrsaBJsFhyz95e5k4HECvVHvom3hLSwx0l9IIg== X-Received: by 10.55.21.102 with SMTP id f99mr2878507qkh.185.1519913341109; Thu, 01 Mar 2018 06:09:01 -0800 (PST) MIME-Version: 1.0 Received: by 10.140.104.13 with HTTP; Thu, 1 Mar 2018 06:09:00 -0800 (PST) In-Reply-To: <20180301140351.gokvstohs3mghz5q@lakrids.cambridge.arm.com> References: <20180301135806.19982-1-benjamin.gaignard@st.com> <20180301135806.19982-2-benjamin.gaignard@st.com> <20180301140351.gokvstohs3mghz5q@lakrids.cambridge.arm.com> From: Benjamin Gaignard Date: Thu, 1 Mar 2018 15:09:00 +0100 Message-ID: Subject: Re: [PATCH v2 1/2] dt-bindings: stm32: Add bindings for Extended TrustZone Protection To: Mark Rutland Cc: Rob Herring , Maxime Coquelin , Alexandre Torgue , Robin Murphy , Arnd Bergmann , Loic PALLARDY , devicetree@vger.kernel.org, Linux ARM , Linux Kernel Mailing List , Benjamin Gaignard Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2018-03-01 15:03 GMT+01:00 Mark Rutland : > On Thu, Mar 01, 2018 at 02:58:05PM +0100, Benjamin Gaignard wrote: >> Extended TrustZone Protection driver is very basic and only needs >> to know where are the registers (no clock, no interrupt) >> >> Signed-off-by: Benjamin Gaignard >> --- >> .../bindings/arm/stm32/st,stm32mp1-etzpc.txt | 25 ++++++++++++++++++++++ >> 1 file changed, 25 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/stm32/st,stm32mp1-etzpc.txt >> >> diff --git a/Documentation/devicetree/bindings/arm/stm32/st,stm32mp1-etzpc.txt b/Documentation/devicetree/bindings/arm/stm32/st,stm32mp1-etzpc.txt >> new file mode 100644 >> index 000000000000..9407e37f7d15 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/stm32/st,stm32mp1-etzpc.txt >> @@ -0,0 +1,25 @@ >> +STMicroelectronics STM32 Extended TrustZone Protection driver >> + >> +Required properties: >> + - compatible : value should be "st,stm32mp1-etzpc" >> + - reg : physical base address of the IP registers and length of memory >> + mapped region. >> + - protected-devices: list of phandle of devices protected by etzpc. >> + Because etzpc driver rely on the phandle index in >> + the list, holes must be filled with a disabled node. > > ... where the index corresponds to what, exactly? to the offset of the status bits in the register > > Padding with a disabled node seems very hacky. If a device node doesn't exist in the DT I need to fill the hole by something to keep the index valid. > > Thanks, > Mark. > >> + >> +Example for stm32mp1: >> + >> +reserved: disabled_node { >> + status = "disabled"; >> +}; >> + >> +etzpc: etzpc@5c007000 { >> + compatible = "st,stm32mp1-etzpc"; >> + reg = <0x5c007000 0x400>; >> + protected-devices = <&usart1>, >> + <&spi6>, >> + <&i2c4>, >> + <&reserved>, >> + <&rng1>; >> +}; >> -- >> 2.15.0 >>