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[209.132.180.67]) by mx.google.com with ESMTP id v12-v6si3076176plk.256.2018.03.01.06.31.36; Thu, 01 Mar 2018 06:31:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h8th1zlu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031447AbeCAOa1 (ORCPT + 99 others); Thu, 1 Mar 2018 09:30:27 -0500 Received: from mail-it0-f68.google.com ([209.85.214.68]:39568 "EHLO mail-it0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031437AbeCAOaY (ORCPT ); Thu, 1 Mar 2018 09:30:24 -0500 Received: by mail-it0-f68.google.com with SMTP id l187so8016889ith.4 for ; Thu, 01 Mar 2018 06:30:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=LasTf4B0lvrn6e+WCRTPpQNj0Y5K5wzwC6swKGnrtDk=; b=h8th1zluncGLTCSi7d78XDAXx6oJqCyjapIm+l/J84hZiixzbhCVBghs8XX0wqhBwO BIRoIaB3DBESqqJsnQAB8x9cVdfHk+aATmgJzi6eWxkTeYrl94VgZMhwojfbyWBbKRvV LLpsKfv1bjq62Up6fOadZAl/xXG6Qddg2vNzM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=LasTf4B0lvrn6e+WCRTPpQNj0Y5K5wzwC6swKGnrtDk=; b=uKZmpjR0vCuIqFLRm8HepfcFeYVieSnzjbeyTrUVptQj2N9tVMvU8a0fOSU7pFui2E WcgjTTQw6/PNUrltzSr8EyfMQHVN49LXN223i/ecvAwDawgCIulaXcaKXY0FWrc6vwJ0 A8AniP4FPXbh8ujIP3GprHXqc6ZdyO2tiJXVNvQqzCvghT0bPQEoldbBXEEHti/XypzF ahond8vtIx/3aLKlQ+HesVuVxwx8TRSvt+g8Q9zPkMO8HdIofXWwid1pgDYwiZZHELoy lvyBvkzjfhBc1Drxd4Au3VNG4yZy2DkcThg1XuZk8ftY/TFe1iC1lYRqOUUuJeFF/QUm V+oQ== X-Gm-Message-State: APf1xPCh+8x/RfOXLplchD4Gvk2yKm54SUH9zQAsUDhgQPYbe5VJgTzn TgOFKvTgDSoW9xBCmdU3QWVxmGW0zF4175BuJIuo1w== X-Received: by 10.36.60.216 with SMTP id m207mr2828330ita.68.1519914623822; Thu, 01 Mar 2018 06:30:23 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.138.209 with HTTP; Thu, 1 Mar 2018 06:30:23 -0800 (PST) In-Reply-To: References: <20180227110107.30259-1-ard.biesheuvel@linaro.org> <20180227110107.30259-2-ard.biesheuvel@linaro.org> From: Ard Biesheuvel Date: Thu, 1 Mar 2018 14:30:23 +0000 Message-ID: Subject: Re: [PATCH v3 1/2] dt-bindings: i2c: add binding for Socionext SynQuacer I2C To: Rob Herring Cc: Wolfram Sang , Mark Rutland , Linux I2C , Devicetree List , "linux-kernel@vger.kernel.org" , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Jassi Brar , Andy Shevchenko Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1 March 2018 at 14:28, Rob Herring wrote: > On Tue, Feb 27, 2018 at 5:01 AM, Ard Biesheuvel > wrote: >> Add a binding for the I2C controller that can be found in the Socionext >> SynQuacer SoC. Note that this is the exact same IP as the Fujitsu F_I2C. > > Is there a binding for that? Should be the same doc if so. > No, there isn't. That support never made it upstream, but I thought it'd be useful to mention it given the Fujitsu -> Socionext name change. >> Signed-off-by: Ard Biesheuvel >> --- >> Documentation/devicetree/bindings/i2c/i2c-synquacer.txt | 29 ++++++++++++++++++++ >> 1 file changed, 29 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/i2c/i2c-synquacer.txt b/Documentation/devicetree/bindings/i2c/i2c-synquacer.txt >> new file mode 100644 >> index 000000000000..4d0bb6a71211 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/i2c/i2c-synquacer.txt >> @@ -0,0 +1,29 @@ >> +Socionext SynQuacer I2C >> + >> +Required properties: >> +- compatible : Must be "socionext,synquacer-i2c" >> +- reg : Offset and length of the register set for the device >> +- interrupts : the interrupt specifier > > How many? > A single one, will change >> +- #address-cells : Must be <1>; >> +- #size-cells : Must be <0>; >> +- clock-names : Must contain "pclk". >> +- clocks : Must contain an entry for each name in clock-names. >> + (See the common clock bindings.) >> + >> +Optional properties: >> +- clock-frequency : Desired I2C bus clock frequency in Hz. As only Normal and >> + Fast modes are supported, possible values are 100000 and >> + 400000. >> + >> +Example : >> + >> + i2c@51210000 { >> + compatible = "socionext,synquacer-i2c"; >> + reg = <0x51210000 0x1000>; >> + interrupts = ; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + clock-names = "pclk"; >> + clocks = <&clk_i2c>; >> + clock-frequency = <400000>; >> + }; >> -- >> 2.11.0 >>