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Date:   Thu, 1 Mar 2018 16:28:26 +0000
From:   Lina Iyer <ilina@codeaurora.org>
To:     Marc Zyngier <marc.zyngier@arm.com>
Cc:     tglx@linutronix.de, jason@lakedaemon.net,
        linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
        rnayak@codeaurora.org, asathyak@codeaurora.org
Subject: Re: [PATCH v8 0/2] irqchip: qcom: add support for PDC interrupt
 controller
Message-ID: <20180301162826.GB19262@codeaurora.org>
References: <20180228172730.25022-1-ilina@codeaurora.org>
 <8768ac0b-0d1c-d415-7b51-b6785dcad05b@arm.com>
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On Thu, Mar 01 2018 at 16:13 +0000, Marc Zyngier wrote:
>On 28/02/18 17:27, Lina Iyer wrote:
>> Changes since v7:
>> 	- fix whitespace alignment for multi-line statement
>> 	- add Rob H 'reviewed-by' for DT bindings
>> 	- rebase on top of 4.6-rc3
>>
>> On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a
>> power domain that can be powered off when not needed. Interrupts that need to
>> be sensed even when the GIC is powered off, are routed through an interrupt
>> controller in an always-on domain called the Power Domain Controller a.k.a PDC.
>> This series adds support for the PDC's interrupt controller.
>>
>> Please consider reviewing these patches.
>>
>> RFC v1: https://patchwork.kernel.org/patch/10180857/
>> RFC v2: https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1600634.html
>> v3: https://lkml.org/lkml/2018/2/6/595
>> v4: https://www.spinics.net/lists/linux-arm-msm/msg32906.html
>> v5: https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1605500.html
>> v6: https://lkml.org/lkml/2018/2/9/545
>> v7: https://www.spinics.net/lists/kernel/msg2723942.html
>>
>> Lina Iyer (2):
>>   drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs
>>   dt-bindings/interrupt-controller: pdc: describe PDC device binding
>
>Queued for 4.17.
>
Thanks Marc.

-- Lina