Received: by 10.223.185.116 with SMTP id b49csp7767477wrg; Thu, 1 Mar 2018 10:44:28 -0800 (PST) X-Google-Smtp-Source: AG47ELusl4M1jC8IdzDl1gMHDRRDXzHnBuYU82HZNt0qpsx0DQFClelBO/lQPhq6F2XQDBHsXV6X X-Received: by 2002:a17:902:6f17:: with SMTP id w23-v6mr2792127plk.336.1519929868470; Thu, 01 Mar 2018 10:44:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519929868; cv=none; d=google.com; s=arc-20160816; b=k+DE1zYmtCorn3CNDwNzZO0zYqDzZqe+a47TEw3ag06xul0ER0VumiK8lh6rISsJzo 06Yx78Dno6PvAOyzjCJn2MrAkZaCiFhlAQ/2PsK7hQb3KtirYL494E/noxWz2vr/iuxo N/tawzX6AR2JyN3L9kMEYGCBnYNcGiESlL91V/LN1iYvKiQt8VWFac/gnWbrUXuFGkf4 Fhx3xbZQrgqP42tIhcJuI4bLv0q26NkL3ObetCrzOon8yLhg6cOcNJCYi3xAFmdTQA+m hfBBwSHlUFhRHzv56Ewz2He17nn/whcitGsgNhDWtDUqxLFyFTgNK3FnL2/BPkmOMnB+ aN0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:arc-authentication-results; bh=yZRM9prihIfyrjg3PcpLyyzEZsAoqRsWtW6wazcXDMA=; b=ywSgWDYEZsDTXspAwh//tLnkW3FEDsQrvv9uhXWE81sWRC1X8jBQgtWFyrIsv7OQ8/ IEkiIKL77+nyMIZchc6JvU4xiluwdOJGV02DuV3cjTlA+yqoUba5bWrgDoNrng2M0Zzk kMV6EIjDglAdceeMeMwrF7BE46YlKcf2wKCdQs1VxF8fl4iFQvLIaeVCNC5ioDxpLRWT QKn4/qfiSAoMCvl1hWBkqZHAZz/dpimQ1MBXRQJ679Ys8/cw2rEMlmLYnxiaN7pNy3ME IMirzsqZRZY2vtDuI8Y0lY9qHrztSgK6c3QId5wCw/vK0GIzxOa8B1sZMY50XBTM6MZl 13nA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z124si2767225pgb.677.2018.03.01.10.44.13; Thu, 01 Mar 2018 10:44:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1034058AbeCASmz (ORCPT + 99 others); Thu, 1 Mar 2018 13:42:55 -0500 Received: from mail.linuxfoundation.org ([140.211.169.12]:37634 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1033831AbeCASmy (ORCPT ); Thu, 1 Mar 2018 13:42:54 -0500 Received: from localhost (clnet-b04-243.ikbnet.co.at [83.175.124.243]) by mail.linuxfoundation.org (Postfix) with ESMTPSA id 704FDE63; Thu, 1 Mar 2018 18:42:53 +0000 (UTC) Date: Thu, 1 Mar 2018 19:42:52 +0100 From: Greg Kroah-Hartman To: Randy Dunlap Cc: Daniel Kurtz , adurbin@chromium.org, briannorris@chromium.org, Jiri Slaby , "open list:SERIAL DRIVERS" , open list Subject: Re: [PATCH] earlycon: Allow specifying a uartclk in options Message-ID: <20180301184252.GA29304@kroah.com> References: <20180301182028.237856-1-djkurtz@chromium.org> <57fb4f35-fd75-b2cc-75f7-8157ab1081d5@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <57fb4f35-fd75-b2cc-75f7-8157ab1081d5@infradead.org> User-Agent: Mutt/1.9.3 (2018-01-21) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 01, 2018 at 10:30:45AM -0800, Randy Dunlap wrote: > On 03/01/2018 10:20 AM, Daniel Kurtz wrote: > > Currently when an earlycon is registered, the uartclk is assumed to be > > BASE_BAUD * 16 = 1843200. If a baud rate is specified in the earlycon > > options, then 8250_early's init_port will program the UART clock divider > > registers based on this assumed uartclk. > > > > However, not all uarts have a UART clock of 1843200. For example, the > > 8250_dw uart in AMD's CZ/ST uses a fixed 48 MHz clock (as specified in > > cz_uart_desc in acpi_apd.c). Thus, specifying a baud when using earlycon > > on such a device will result in incorrect divider values and a wrong UART > > clock. > > > > Fix this by extending the earlycon options parameter to allow specification > > of a uartclk, like so: > > > > earlycon=uart,mmio32,0xfedc6000,115200,48000000 > > > > If none is specified, fall-back to prior behavior - 1843200. > > > > Signed-off-by: Daniel Kurtz > > Hi, > > Hopefully there will also be an update to one of > Documentation/admin-guide/kernel-parameters.txt or > Documentation/admin-guide/serial-console.rst. Well, considering I'm not taking this patch unless it comes with such an update, I'm hoping as well :) greg k-h