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[209.132.180.67]) by mx.google.com with ESMTP id u3si2946233pgo.349.2018.03.01.13.38.44; Thu, 01 Mar 2018 13:38:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@intel-com.20150623.gappssmtp.com header.s=20150623 header.b=Oz62UV03; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1162280AbeCAVhS (ORCPT + 99 others); Thu, 1 Mar 2018 16:37:18 -0500 Received: from mail-oi0-f66.google.com ([209.85.218.66]:37208 "EHLO mail-oi0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1162175AbeCAVhE (ORCPT ); Thu, 1 Mar 2018 16:37:04 -0500 Received: by mail-oi0-f66.google.com with SMTP id f186so5634760oig.4 for ; Thu, 01 Mar 2018 13:37:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=gDqI36FLaMpZegvNnPV/MMQojc0B01/u06fqE0jawrg=; b=Oz62UV03293pb5Hs8BCXcrmDYRv9LIjDs+AL/LdUiTEyhAJOlyy8SojogGRdizjf3r AbjRNKXrF43W055F2dUQWpxm3qnU6i+0r9J4wrPGUFFMrPHR0wTIYvkI065FCubp2N7r DpP0fqZeZxBhfIJbXejYSeW5FTa2w+g5qGoPiIe+NDD97ZYevfz37RNaSrNXixS7/dvb eyrlyRDCxFZZz4mb8IhzdZGctS1ZHoqJLFchVB2ldWVorGvQi2GFaa7TE+J4RlQDDr62 hBmNwL2JD/5Q/mOiRXV9DmLOtjmtJonARbJrxkT1vKbS84JVzByPT7gYTOiHISRIq/NA FzFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=gDqI36FLaMpZegvNnPV/MMQojc0B01/u06fqE0jawrg=; b=jVG2o+qj1Ush7b0cQ0qBFZggewEHmVruu05y133Gggbi9bSRcXO17CwUYV9Kqb1VzB uueWuRg97VylWIUxKdr5IJlCKSHXv1s2lAkEasKQasuZt4z/LzitQpF6SMiWCJcuQKd0 iX9P0BTaUxfLr+RRudA6nEHAZhI3Ym/quosKkYGIVyHrUCheyuL0+ACOpHqvaEsvJoHw EYCDWjw3treCEdeec3RjEAG+KIjldfdtIJV5lSkKT2ou5FGp8+2Qrw9dDFZzFDg4g5zU UzxJk2Hc+KZyBz9iW6I+68VDcjpzxmqptlShnHVaHjVU7zbBfq5fJ3vbDujNzm6xVCBS xABg== X-Gm-Message-State: AElRT7FS4V+qxQUCVY5Z6CfN1sTWgaE4PVdbJlI2c7RGhDfSPdcIEjRh F5eEZL2XgHc5/7k8f+ATy3JuLMAeslfmUOFW7rJyZw== X-Received: by 10.84.68.7 with SMTP id k7mr2144987oiw.118.1519940223788; Thu, 01 Mar 2018 13:37:03 -0800 (PST) MIME-Version: 1.0 Received: by 10.157.81.210 with HTTP; Thu, 1 Mar 2018 13:37:03 -0800 (PST) In-Reply-To: <1519936477.4592.23.camel@au1.ibm.com> References: <20180228234006.21093-1-logang@deltatee.com> <1519876489.4592.3.camel@kernel.crashing.org> <1519876569.4592.4.camel@au1.ibm.com> <1519936477.4592.23.camel@au1.ibm.com> From: Dan Williams Date: Thu, 1 Mar 2018 13:37:03 -0800 Message-ID: Subject: Re: [PATCH v2 00/10] Copy Offload in NVMe Fabrics with P2P PCI Memory To: benh@au1.ibm.com Cc: Logan Gunthorpe , Linux Kernel Mailing List , linux-pci@vger.kernel.org, linux-nvme@lists.infradead.org, linux-rdma , linux-nvdimm , linux-block@vger.kernel.org, Stephen Bates , Christoph Hellwig , Jens Axboe , Keith Busch , Sagi Grimberg , Bjorn Helgaas , Jason Gunthorpe , Max Gurtovoy , =?UTF-8?B?SsOpcsO0bWUgR2xpc3Nl?= , Alex Williamson , Oliver OHalloran Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 1, 2018 at 12:34 PM, Benjamin Herrenschmidt wrote: > On Thu, 2018-03-01 at 11:21 -0800, Dan Williams wrote: >> On Wed, Feb 28, 2018 at 7:56 PM, Benjamin Herrenschmidt >> wrote: >> > On Thu, 2018-03-01 at 14:54 +1100, Benjamin Herrenschmidt wrote: >> > > On Wed, 2018-02-28 at 16:39 -0700, Logan Gunthorpe wrote: >> > > > Hi Everyone, >> > > >> > > >> > > So Oliver (CC) was having issues getting any of that to work for us. >> > > >> > > The problem is that acccording to him (I didn't double check the latest >> > > patches) you effectively hotplug the PCIe memory into the system when >> > > creating struct pages. >> > > >> > > This cannot possibly work for us. First we cannot map PCIe memory as >> > > cachable. (Note that doing so is a bad idea if you are behind a PLX >> > > switch anyway since you'd ahve to manage cache coherency in SW). >> > >> > Note: I think the above means it won't work behind a switch on x86 >> > either, will it ? >> >> The devm_memremap_pages() infrastructure allows placing the memmap in >> "System-RAM" even if the hotplugged range is in PCI space. So, even if >> it is an issue on some configurations, it's just a simple adjustment >> to where the memmap is placed. > > But what happens with that PCI memory ? Is it effectively turned into > nromal memory (ie, usable for normal allocations, potentially used to > populate user pages etc...) or is it kept aside ? > > Also on ppc64, the physical addresses of PCIe make it so far appart > that there's no way we can map them into the linear mapping at the > normal offset of PAGE_OFFSET + (pfn << PAGE_SHIFT), so things like > page_address or virt_to_page cannot work as-is on PCIe addresses. Ah ok, I'd need to look at the details. I had been assuming that sparse-vmemmap could handle such a situation, but that could indeed be a broken assumption.