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[209.132.180.67]) by mx.google.com with ESMTP id w22si1348938pge.666.2018.03.01.14.29.30; Thu, 01 Mar 2018 14:29:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EGY0Zeab; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1162608AbeCAW2u (ORCPT + 99 others); Thu, 1 Mar 2018 17:28:50 -0500 Received: from mail-it0-f43.google.com ([209.85.214.43]:50268 "EHLO mail-it0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1162556AbeCAW2r (ORCPT ); Thu, 1 Mar 2018 17:28:47 -0500 Received: by mail-it0-f43.google.com with SMTP id d13so6880315itf.0 for ; Thu, 01 Mar 2018 14:28:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=BRrEJLOVII5Ureb5dy8h1N5QUHlqJESta7GBA38YIzk=; b=EGY0Zeab0OwIbIe0HBjwFpne2VlePnuj2qJRsl2cNFUUElb7SQcq9uCAB8Q48izm0m d+VzQshu/QNQ5b1j1pEhUhR3Wv2yR2klB9tqfMwsklYqapP7gKeHRyxQs9RFUUfDcXAD Jj6ji4/4j4i49k3sX+T0ZiS0FlssTDhVIp9q4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=BRrEJLOVII5Ureb5dy8h1N5QUHlqJESta7GBA38YIzk=; b=K8+dkxblldqgYOVce/b6Aj3V0fwcP0RToOrr9dk/6ZKLogRFuRsVlWwhu3i+KurukF 0UF/hXhXAq/T5JjaKhejhfyUAZPVJUdTNu+vKN8tPG6QKvbMlM7J7bz+f4c2yEM+4m+s 0XmQ57YPtV3gt3dtSQ14c5+hzVQzH79Dm+5Zu3KeLalDVRy/6uOCqgAKUhDs1iMEmHBF +LaWnZOVw91y3G4VGsdHjvh5B7MlugF18lUv2t+srmwQirNWwRVdZ+zMdYaCBZOl0qDg joezrr7U9n5NwE0rP+5sU6DCKa4WFUlzvl7cmryjATrnTeezYmz83GQHY5qDJ8PvPwuD /7qA== X-Gm-Message-State: AElRT7Fo0vh/znmxEqVixTn/RsDw+xI8OvW7MiK+i9WwnwSdhmwXL5tu ommODnne9haQoWMawxCXQmPkmLHOqfV6aWy49PeALH67 X-Received: by 10.36.104.1 with SMTP id v1mr3986240itb.70.1519943326787; Thu, 01 Mar 2018 14:28:46 -0800 (PST) MIME-Version: 1.0 Received: by 10.79.230.25 with HTTP; Thu, 1 Mar 2018 14:28:46 -0800 (PST) In-Reply-To: <276d5f97-55c2-406e-92c7-0d03c7f7a49d@st.com> References: <1518100057-23234-1-git-send-email-amelie.delaunay@st.com> <276d5f97-55c2-406e-92c7-0d03c7f7a49d@st.com> From: Linus Walleij Date: Thu, 1 Mar 2018 23:28:46 +0100 Message-ID: Subject: Re: [PATCH 0/6] Introduce STMicroelectronics MultiFunction eXpander To: Amelie DELAUNAY Cc: Lee Jones , Rob Herring , Mark Rutland , Russell King , Alexandre TORGUE , Maxime Coquelin , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux ARM Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 22, 2018 at 4:13 PM, Amelie DELAUNAY wrote: > ST MFX is different from STMPE as far as the HW is completely different. > IDD is a new feature. > TS management is completely different. > GPIO management looks like but is also rather different. > ST MFX counts a first level of 8 interrupts (acked by writing in the ACK > register), then a second level of 24 interrupts for GPIOs. GPIO IRQ can > be triggered on low level, falling edge, high level, rising edge. GPIO > IRQ have to be acked by writing in the GPI_ACK register, GPIO can be > output open-drain with/without internal pull-up, output push-pull, input > with pull-up/down, input floating or analog. Okay I am convinced that we need to model this as its own driver if it is as different as you say. But let's keep an eye on STMPE's approaches and what it does right and wrong. If I rewrote the STMPE driver today, the major changes would be to use regmap to pass around to subdrivers, and implement a combined pin control and GPIO driver, so I think those things should be nice to have for the next iteration. Yours, Linus Walleij