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[209.132.180.67]) by mx.google.com with ESMTP id m2si3720988pgt.56.2018.03.02.00.08.03; Fri, 02 Mar 2018 00:08:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=eTONTiDm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1034357AbeCBIGE (ORCPT + 99 others); Fri, 2 Mar 2018 03:06:04 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:53345 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1034345AbeCBIGB (ORCPT ); Fri, 2 Mar 2018 03:06:01 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w2285kYR029267; Fri, 2 Mar 2018 02:05:47 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1519977947; bh=OJI+Tw+eBQ/qzyVRW1M7eFTUODiA0/MWmxL9SE56C5c=; h=Subject:To:References:CC:From:Date:In-Reply-To; b=eTONTiDmkn9DHHO0/vNIe+Svo7DnVJPO2R4J+kc1Li1L0JwMHQG011977zTJbpqI+ VThygruQNexKfd15rSoHyQ5WUSg6ILpUtUqquKSut7LDHt0BatiIGljyvM3WrG8dCp xqgq8tvnrcX9hLY6u6FJaeymCC4fQCUVd0wzpHdo= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2285kKs011960; Fri, 2 Mar 2018 02:05:46 -0600 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 2 Mar 2018 02:05:46 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 2 Mar 2018 02:05:46 -0600 Received: from [172.24.190.233] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2285iSv018429; Fri, 2 Mar 2018 02:05:44 -0600 Subject: Re: [PATCH v3 1/2] dt-bindings: add bindings doc for HiSilicon INNO USB2 PHY To: Shawn Guo References: <1519888940-23235-1-git-send-email-shawn.guo@linaro.org> <1519888940-23235-2-git-send-email-shawn.guo@linaro.org> <20180302073740.GC28619@dragon> CC: Rob Herring , Jianguo Sun , Jiancheng Xue , , , Pengcheng Li From: Kishon Vijay Abraham I Message-ID: <05d00dd2-efe2-1166-d982-06df0e3b8611@ti.com> Date: Fri, 2 Mar 2018 13:35:43 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <20180302073740.GC28619@dragon> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Friday 02 March 2018 01:07 PM, Shawn Guo wrote: > Hi Kishon, > > On Fri, Mar 02, 2018 at 11:55:57AM +0530, Kishon Vijay Abraham I wrote: >> On Thursday 01 March 2018 12:52 PM, Shawn Guo wrote: >>> From: Pengcheng Li >>> >>> It adds device tree bindings document for HiSilicon INNO USB2 PHY. >>> >>> Signed-off-by: Pengcheng Li >>> Signed-off-by: Jiancheng Xue >>> Signed-off-by: Shawn Guo >>> --- >>> .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 52 ++++++++++++++++++++++ >>> 1 file changed, 52 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt >>> >>> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt >>> new file mode 100644 >>> index 000000000000..b563cf54ca7b >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt >>> @@ -0,0 +1,52 @@ >>> +HiSilicon INNO USB2 PHY >>> + >>> +Required properties: >>> +- compatible: Should be one of the following strings: >>> + "hisilicon,inno-usb2-phy", >>> + "hisilicon,hi3798cv200-usb2-phy". >>> +- reg: Should be the address space for PHY configuration register in peripheral >>> + controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798cv200 SoC. >>> +- #phy-cells: Should be 1. The specifier is the index of the PHY port to >>> + reference. >> >> This can be '0' if the consumers directly use phandle to the subnodes. > > Yes, I understand that for most of PHY devices #phy-cells is just 0, and > consumers simply use the phandle without any cell number. But for this > inno-usb2-phy, every single device contains two PHY ports, and each port Why not have a separate sub-node for each phy port? Then you can just use phandle to the subnode in the controller node. Thanks Kishon