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[216.188.254.6]) by smtp.gmail.com with ESMTPSA id r58sm3537975otb.58.2018.03.02.08.48.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 02 Mar 2018 08:48:04 -0800 (PST) Date: Fri, 2 Mar 2018 10:48:03 -0600 From: Rob Herring To: Michal Simek Cc: devicetree@vger.kernel.org, monstr@monstr.eu, Masahiro Yamada , linux-kernel@vger.kernel.org, Arnd Bergmann , Will Deacon , Catalin Marinas , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 3/8] arm64: zynqmp: Add support for Xilinx zcu102 Message-ID: <20180302164803.nb45aqgqvnzxuyn5@rob-hp-laptop> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Feb 23, 2018 at 03:40:25PM +0100, Michal Simek wrote: > This patch is adding revA, revB and rev1.0. There are also other > revisions between which should be backward compatible with previous > versions. Unfortunately all revs are still in use. > > Signed-off-by: Michal Simek > --- > > Changes in v2: > - Remove i2c mw u-boot commands > - Use i2c-mux instead of i2cswitch > - Use clock generator without numbers. > - Use dash in node name zcu102 rev1.0 > - Record compatible string to xilinx.txt > > Documentation/devicetree/bindings/arm/xilinx.txt | 5 + > arch/arm64/boot/dts/xilinx/Makefile | 3 + > .../arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 36 ++ > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 550 +++++++++++++++++++++ > arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts | 42 ++ > 5 files changed, 636 insertions(+) > create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts > create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts > create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts Reviewed-by: Rob Herring but... > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts > new file mode 100644 > index 000000000000..ed3cc684931f > --- /dev/null > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts > @@ -0,0 +1,42 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * dts file for Xilinx ZynqMP ZCU102 RevB > + * > + * (C) Copyright 2016 - 2018, Xilinx, Inc. > + * > + * Michal Simek > + */ > + > +#include "zynqmp-zcu102-revA.dts" > + > +/ { > + model = "ZynqMP ZCU102 RevB"; > + compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; > +}; > + > +&gem3 { > + phy-handle = <&phyc>; > + phyc: phy@c { > + reg = <0xc>; > + ti,rx-internal-delay = <0x8>; > + ti,tx-internal-delay = <0xa>; > + ti,fifo-depth = <0x1>; > + }; > + /* Cleanup from RevA */ > + /delete-node/ phy@21; > +}; > + > +/* Different qspi 512Mbit version */ Stray comment > + > +/* Fix collision with u61 */ > +&i2c0 { > + i2cswitch@75 { Missed this name. This probably creates a new node rather than going into the existing tree. If this compiles, we should fix it to not allow the same unit-address twice. > + i2c@2 { > + max15303@1b { /* u8 */ > + compatible = "maxim,max15303"; > + reg = <0x1b>; > + }; > + /delete-node/ max15303@20; > + }; > + }; > +}; > -- > 1.9.1 >