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From:   Sasha Levin <Alexander.Levin@microsoft.com>
To:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "stable@vger.kernel.org" <stable@vger.kernel.org>
CC:     Roger Quadros <rogerq@ti.com>, Tero Kristo <t-kristo@ti.com>,
        Tony Lindgren <tony@atomide.com>,
        Sasha Levin <Alexander.Levin@microsoft.com>
Subject: [PATCH AUTOSEL for 4.9 082/219] ARM: DRA7: hwmod_data: Prevent
 wait_target_disable error for usb_otg_ss
Thread-Topic: [PATCH AUTOSEL for 4.9 082/219] ARM: DRA7: hwmod_data: Prevent
 wait_target_disable error for usb_otg_ss
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Date:   Sat, 3 Mar 2018 22:28:43 +0000
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From: Roger Quadros <rogerq@ti.com>

[ Upstream commit e2d54fe76997301b49311bde7ba8ef52b47896f9 ]

It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss
is in use then there are random chances that the usb_otg_ss module
will fail to completely idle. i.e. IDLEST =3D 0x2 instead of 0x3.

Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use
fixes this issue.

We don't know yet if usb_otg_ss instances 3 and 4 are affected by this
issue or not so don't add this flag for those instances.

Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap=
2/omap_hwmod_7xx_data.c
index 1ab7096af8e2..39137231f2b2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -2572,6 +2572,7 @@ static struct omap_hwmod dra7xx_usb_otg_ss1_hwmod =3D=
 {
 	.class		=3D &dra7xx_usb_otg_ss_hwmod_class,
 	.clkdm_name	=3D "l3init_clkdm",
 	.main_clk	=3D "dpll_core_h13x2_ck",
+	.flags		=3D HWMOD_CLKDM_NOAUTO,
 	.prcm =3D {
 		.omap4 =3D {
 			.clkctrl_offs =3D DRA7XX_CM_L3INIT_USB_OTG_SS1_CLKCTRL_OFFSET,
@@ -2593,6 +2594,7 @@ static struct omap_hwmod dra7xx_usb_otg_ss2_hwmod =3D=
 {
 	.class		=3D &dra7xx_usb_otg_ss_hwmod_class,
 	.clkdm_name	=3D "l3init_clkdm",
 	.main_clk	=3D "dpll_core_h13x2_ck",
+	.flags		=3D HWMOD_CLKDM_NOAUTO,
 	.prcm =3D {
 		.omap4 =3D {
 			.clkctrl_offs =3D DRA7XX_CM_L3INIT_USB_OTG_SS2_CLKCTRL_OFFSET,
--=20
2.14.1