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Sat, 3 Mar 2018 17:31:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=DWUOsPk3WdSw3+oD1JrNuUiq/427WQdYnW/PnFTmUIc=; b=AZLL819323W67i4nieMaPDGaS1eZNvWlCSntN43XmfciF/jLsgfJp9EFMkPs2nijC7XQVi0UOPlcaExAEBidHff3Zdc0vjAbXHnQYogjLvbU0UyQ+REOei8AdcoR1g/wi2TOAY4b0K6WjVRoR06i/0nnFvH7uRkYlQw3ggra/H0= Received: from MW2PR2101MB1034.namprd21.prod.outlook.com (52.132.149.10) by MW2PR2101MB0970.namprd21.prod.outlook.com (52.132.146.19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.567.3; Sat, 3 Mar 2018 22:31:23 +0000 Received: from MW2PR2101MB1034.namprd21.prod.outlook.com ([fe80::1d56:338f:e2b:cec0]) by MW2PR2101MB1034.namprd21.prod.outlook.com ([fe80::1d56:338f:e2b:cec0%3]) with mapi id 15.20.0567.006; Sat, 3 Mar 2018 22:31:22 +0000 From: Sasha Levin To: "linux-kernel@vger.kernel.org" , "stable@vger.kernel.org" CC: Al Cooper , Florian Fainelli , Sasha Levin Subject: [PATCH AUTOSEL for 4.9 029/219] ARM: brcmstb: Enable ZONE_DMA for non 64-bit capable peripherals Thread-Topic: [PATCH AUTOSEL for 4.9 029/219] ARM: brcmstb: Enable ZONE_DMA for non 64-bit capable peripherals Thread-Index: AQHTsz7q05+UCfefME+R8n32mbAIDA== Date: Sat, 3 Mar 2018 22:28:12 +0000 Message-ID: <20180303222716.26640-29-alexander.levin@microsoft.com> References: <20180303222716.26640-1-alexander.levin@microsoft.com> In-Reply-To: <20180303222716.26640-1-alexander.levin@microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [52.168.54.252] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;MW2PR2101MB0970;7:zxMCm5bPqOiStd3cIrwNLTyuKRwBcp4v98OFhbwvYFvFogkuOEIjxAHANS28kRvaISuYDjOhrCSt4uU61oS9rpDIfK0KxZv05zhVpULue4KR7g/SQpKziCnJeZFLaxQ1lEhtQI8kMK9rs9ojLR/L34/PMBkH3sSYmyP5TL/qbxYCKmTOf4qj94Zglwc0mvpP69z2wTumXwIqkbITPDthSWl1hu45cDbN9ekobWaZDnGhqEhvg8tEijWGTpJUA2tl x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 6723c1c1-6394-4e06-9b96-08d581567e57 x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(7020095)(4652020)(4534165)(4627221)(201703031133081)(201702281549075)(48565401081)(5600026)(4604075)(3008032)(2017052603307)(7193020);SRVR:MW2PR2101MB0970; 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received-spf: None (protection.outlook.com: microsoft.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: Wc02rMRyendzZJ184YE9I+nSupTqH0FnJ3HKMwf1A/2Gj2k9gBHQ8MGmLXNk29TdNHAc2EcszeFKLFXjIBOcEuXxM1hAYx5rjOggRb4VOIyCnPbD4A9W5WmXTkPcGge31IaJ1DjRqxebkTZ4UPlcxRfC7GoPsbmgLzCyyZBYdR8= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6723c1c1-6394-4e06-9b96-08d581567e57 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Mar 2018 22:28:12.6193 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR2101MB0970 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Al Cooper [ Upstream commit 3c51b9c7f1fae00c25f1e34da649a288e3fea1ae ] Some Host Controller hardware blocks, like the OHCI, EHCI and SDIO controllers, have hardware blocks that are not capable of doing 64 bit DMA. These host controllers fail on boards with >3GB of memory because the memory above 3GB is located physically >=3D 0x100000000 and can only be accessed using 64 DMA. The way Linux is currently configured for BRCMSTB systems, the memory given to drivers for DMA through functions like dma_alloc_coherent() comes from CMA memory and CMA memory is taken from the top of physical memory. When these drivers get a DMA buffer with an address >=3D0x100000000, they end up dropping the upper 32 bit of the address causing the hardware to DMA to incorrect memory, typically BMEM (custom memory carveout). This issue was discovered on a BCM97449SSV_DDR4 system with 4GB or memory. The fix is to enable CONFIG_ZONE_DMA. On ARM systems this makes sure that all DMA memory is located within the first 32 bits of address space. Signed-off-by: Al Cooper Signed-off-by: Florian Fainelli Signed-off-by: Sasha Levin --- arch/arm/mach-bcm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index a0e66d8200c5..403db76e3497 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -199,6 +199,7 @@ config ARCH_BRCMSTB select BRCMSTB_L2_IRQ select BCM7120_L2_IRQ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE + select ZONE_DMA if ARM_LPAE select SOC_BRCMSTB select SOC_BUS help --=20 2.14.1