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[209.132.180.67]) by mx.google.com with ESMTP id a69-v6si9031687pli.31.2018.03.05.00.56.00; Mon, 05 Mar 2018 00:56:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AB22GPEX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752439AbeCEIqG (ORCPT + 99 others); Mon, 5 Mar 2018 03:46:06 -0500 Received: from mail-io0-f194.google.com ([209.85.223.194]:34556 "EHLO mail-io0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933168AbeCEIqA (ORCPT ); Mon, 5 Mar 2018 03:46:00 -0500 Received: by mail-io0-f194.google.com with SMTP id e7so17120732ioj.1 for ; Mon, 05 Mar 2018 00:46:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=agk/DSpX2DcY3J0ZGtrwjK09DmRBxWN7U6UR5lQ7dTI=; b=AB22GPEXjVDEMbnvG1ylomLyeMaqEz0TOcHfYdiedJUiEFa47q9kr46PuGR7msZ04k O4QoL2oVpB+uEwsumQ8uIC6vTZsEXju8np3YLGKEDa5wZCmaEqJ/tyhqzmHHV1/zF+R1 uh4cXOOLaGfGowQSWF+mLx+M6x1iz9rCoRGnM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=agk/DSpX2DcY3J0ZGtrwjK09DmRBxWN7U6UR5lQ7dTI=; b=ZpaIQn85eoCs2EiceUh1S4o2d79xyO4vUxCCyDJatPDcDBqHsQNciiA8Px5/DAF7yh NClRIWDFP36P47mplZBX2YCIMvqzrRhXTsO1K3TtMtxy0qiw0bc/YZANLRMN9/0zM9H/ VEs06coply1Ilx0Ct2K/KEMcCrZYll7IUtW4BGQbWoSECgtpP8EGw/Kp89bIauS4A1As D5cBv57qaozvmiR6gS0mNqJOwvZLOQaVgl3jnGNmOdnl3PRWBX8U2BOEA7xUA3uqz7rS 8FvEo2j5kOgBgtwF9j8ReEgmwFbj2VMgEKZ5/6/vEN9W9LVfuJm/tIedLqgMGVei6KL7 BwcQ== X-Gm-Message-State: APf1xPCRCHkuqg7zak9OiRT6SvoGMwbZ7ake/LD1jrvHricvSVSNphu4 2nD5h4/kWCkt8TiMtmyx5hXU2BIdg+kXgjpVmnfotn+y X-Received: by 10.107.36.204 with SMTP id k195mr15930347iok.131.1520239559882; Mon, 05 Mar 2018 00:45:59 -0800 (PST) MIME-Version: 1.0 Received: by 10.2.91.10 with HTTP; Mon, 5 Mar 2018 00:45:59 -0800 (PST) In-Reply-To: <83a3ee9471cc7312b9cc43bcf692939e90af34ba.1520232933.git.sean.wang@mediatek.com> References: <6cb1d6d4ee40a61f7b33aed1711753342590d0dd.1520232933.git.sean.wang@mediatek.com> <83a3ee9471cc7312b9cc43bcf692939e90af34ba.1520232933.git.sean.wang@mediatek.com> From: Ulf Hansson Date: Mon, 5 Mar 2018 09:45:59 +0100 Message-ID: Subject: Re: [PATCH 2/2] mmc: mediatek: add support for MT7622 SoC To: sean.wang@mediatek.com Cc: Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, "linux-mmc@vger.kernel.org" , Linux Kernel Mailing List , Chaotian Jing Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5 March 2018 at 08:03, wrote: > From: Sean Wang > > Just applying the existing logic and adding its own characteristics into > the space pointed by an extra entry of struct of_device_id to have support > of MT7622 SoC. > > Signed-off-by: Chaotian Jing > Signed-off-by: Sean Wang > Tested-by: Jumin Li Thanks, applied for next! Kind regards Uffe > --- > drivers/mmc/host/mtk-sd.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c > index 6457a7d..cb274e8 100644 > --- a/drivers/mmc/host/mtk-sd.c > +++ b/drivers/mmc/host/mtk-sd.c > @@ -438,11 +438,23 @@ static const struct mtk_mmc_compatible mt2712_compat = { > .enhance_rx = true, > }; > > +static const struct mtk_mmc_compatible mt7622_compat = { > + .clk_div_bits = 12, > + .hs400_tune = false, > + .pad_tune_reg = MSDC_PAD_TUNE0, > + .async_fifo = true, > + .data_tune = true, > + .busy_check = true, > + .stop_clk_fix = true, > + .enhance_rx = true, > +}; > + > static const struct of_device_id msdc_of_ids[] = { > { .compatible = "mediatek,mt8135-mmc", .data = &mt8135_compat}, > { .compatible = "mediatek,mt8173-mmc", .data = &mt8173_compat}, > { .compatible = "mediatek,mt2701-mmc", .data = &mt2701_compat}, > { .compatible = "mediatek,mt2712-mmc", .data = &mt2712_compat}, > + { .compatible = "mediatek,mt7622-mmc", .data = &mt7622_compat}, > {} > }; > MODULE_DEVICE_TABLE(of, msdc_of_ids); > -- > 2.7.4 >