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[209.132.180.67]) by mx.google.com with ESMTP id s185si8169431pgc.718.2018.03.05.01.46.53; Mon, 05 Mar 2018 01:47:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933141AbeCEIoQ (ORCPT + 99 others); Mon, 5 Mar 2018 03:44:16 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:53923 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932681AbeCEIoN (ORCPT ); Mon, 5 Mar 2018 03:44:13 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w258cw2d028447; Mon, 5 Mar 2018 09:43:52 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2gfj219bkf-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 05 Mar 2018 09:43:52 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 89B8134; Mon, 5 Mar 2018 08:43:51 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 627272650; Mon, 5 Mar 2018 08:43:51 +0000 (GMT) Received: from [10.201.21.58] (10.75.127.47) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 5 Mar 2018 09:43:50 +0100 Subject: Re: [PATCH v2 0/6] Add mmc support for STM32F7 boards To: , , , , , , , CC: References: <1519901623-23216-1-git-send-email-patrice.chotard@st.com> From: Alexandre Torgue Message-ID: <44ed2e2c-83f1-77f5-fa70-29c5525b9ee7@st.com> Date: Mon, 5 Mar 2018 09:43:49 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <1519901623-23216-1-git-send-email-patrice.chotard@st.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG5NODE1.st.com (10.75.127.13) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-03-05_03:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Patrice, On 03/01/2018 11:53 AM, patrice.chotard@st.com wrote: > From: Patrice Chotard > > This series adds : > _ SDIO pins definition for STM32F7 SoCs family > _ add sdio1 DT entry for STM32F746 Discovery board > _ add sdio1 DT entry for STM32F746 Evaluation board > _ add sdio1 DT entry for STM32F769 Discovery board > _ add SDMMC2 entry in stm32f7-rcc.h > _ replace sdio2 hard coded value in stm32f746.dtsi > > v2: _ rename sdio_pins / sdio_od_pins to sdio_pins_a / sdio_od_pins_a > and update board dts files accordingly. > > > Patrice Chotard (6): > ARM: dts: stm32: Add sdio pins definition for stm32f7 > ARM: dts: stm32: Enable sdio1 for stm32f746-disco > ARM: dts: stm32: Enable sdio1 for stm32f746-eval > ARM: dts: stm32: Enable sdio1 for stm32f769-disco > dt-bindings: mfd: Add STM32F7 SDMMC2 rcc entry > ARM: dts: stm32: Fix sdio2 rcc hard coded value > > arch/arm/boot/dts/stm32746g-eval.dts | 17 ++++++++++ > arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 62 ++++++++++++++++++++++++++++++++++ > arch/arm/boot/dts/stm32f746-disco.dts | 19 +++++++++++ > arch/arm/boot/dts/stm32f746.dtsi | 2 +- > arch/arm/boot/dts/stm32f769-disco.dts | 19 +++++++++++ > include/dt-bindings/mfd/stm32f7-rcc.h | 1 + > 6 files changed, 119 insertions(+), 1 deletion(-) > Series applied on stm32-next. Regards Alex