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[209.132.180.67]) by mx.google.com with ESMTP id m12-v6si6306934pls.74.2018.03.05.06.08.06; Mon, 05 Mar 2018 06:08:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934737AbeCELgi (ORCPT + 99 others); Mon, 5 Mar 2018 06:36:38 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:28934 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S934689AbeCELgB (ORCPT ); Mon, 5 Mar 2018 06:36:01 -0500 X-UUID: 754c5ee2dae349ffa45dd617f5a1e366-20180305 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 595673420; Mon, 05 Mar 2018 19:35:56 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Mon, 5 Mar 2018 19:35:54 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Mon, 5 Mar 2018 19:35:54 +0800 From: Zhiyong Tao To: , , , CC: , , , , , , , , , , , , , Zhiyong Tao Subject: [PATCH v3 4/4] pintcrl: support bias-disable of generic and special pins simultaneously Date: Mon, 5 Mar 2018 19:35:45 +0800 Message-ID: <1520249745-6757-5-git-send-email-zhiyong.tao@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1520249745-6757-1-git-send-email-zhiyong.tao@mediatek.com> References: <1520249745-6757-1-git-send-email-zhiyong.tao@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org For generic pins, parameter "arg" is 0 or 1. For special pins, bias-disable is set by R0R1, so we need transmited "00" to set bias-disable When we set "bias-disable" as high-z property, the parameter should be "MTK_PUPD_SET_R1R0_00". Signed-off-by: Zhiyong Tao --- drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c index 3cf384f..f991ff3 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -293,7 +293,7 @@ static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl, unsigned int pin, bool enable, bool isup, unsigned int arg) { unsigned int bit; - unsigned int reg_pullen, reg_pullsel; + unsigned int reg_pullen, reg_pullsel, r1r0; int ret; /* Some pins' pull setting are very different, @@ -301,8 +301,12 @@ static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl, * resistor bit, so we need this special handle. */ if (pctl->devdata->spec_pull_set) { + /* For special pins, bias-disable is set by R1R0, + * the parameter should be "MTK_PUPD_SET_R1R0_00". + */ + r1r0 = enable ? arg : MTK_PUPD_SET_R1R0_00; ret = pctl->devdata->spec_pull_set(mtk_get_regmap(pctl, pin), - pin, pctl->devdata->port_align, isup, arg); + pin, pctl->devdata->port_align, isup, r1r0); if (!ret) return 0; } -- 1.9.1