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[209.132.180.67]) by mx.google.com with ESMTP id f5si8340861pgq.806.2018.03.05.06.17.13; Mon, 05 Mar 2018 06:17:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=Y/T+5Bfi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935045AbeCENCV (ORCPT + 99 others); Mon, 5 Mar 2018 08:02:21 -0500 Received: from mail-ot0-f173.google.com ([74.125.82.173]:33874 "EHLO mail-ot0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934897AbeCENCS (ORCPT ); Mon, 5 Mar 2018 08:02:18 -0500 Received: by mail-ot0-f173.google.com with SMTP id n74so14802643ota.1 for ; Mon, 05 Mar 2018 05:02:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=kCT3KwZ9QkUSo+JEmB70QrbTpGgHS5rhnYkquaQvxb8=; b=Y/T+5Bfi7YovJik0DEklY/v1hFSgp6MpOQ0qm/CzUNo9rfwl36Utl5Dfkf4uMcvVCc IWA9/Lwlnhg6hPAQMnyNvL6zOZGU8aj5Z+Qu3LfsXLhpIBdcIYhwPCSQfDqeuy82lu6a +EU+gL73sqe9tS1786M0zherBzfS22qLlPfVkMkXPpfJJokQTHGEs2fqj8jt/BUz359d qzGVqp9Rbi+MwGy3kx9YhJOqt+lDtQwHYcJZuQqouie9TOcn5ZiRqufEAKFQ190tgR0K M5o29dn/lv8KFHbe2w0IzP2vGgb1jSHDtOqVkwjMWXu31Wj8TcRaMGFJY+u8Kf92tpFJ r5ww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=kCT3KwZ9QkUSo+JEmB70QrbTpGgHS5rhnYkquaQvxb8=; b=NF6G83aSjDjRmp4MGx8PE90bo3UT5XgIc+HKSTjXNN7/20FKtz9wiYR6Vz0gOjskD/ ryUGjNpN83bpdjwYJJ4pGgMIykxNwJCzZzvc/1EfEETUenfNEMCyVPLVCAauJaq4OrCI n7ZnHxplQwph4fVyAWXBtrjvsxGWGkWI9Dj06dBKoBQTJeibqMZ/F/ZPrseBdxydiYTm DERiQ6f60RR9f+lr2voQbMOeMahe0ukpBEQJc3dzl0JqhRPtvaFcGEqKKT/TasAZWJAI FIiUAjtL0lOImzouR98PKWF4iWlqU/bb2PDRlAv6iujZUoNnIK24DmazeQlAQpNAjrJr /6zA== X-Gm-Message-State: AElRT7HRwBDFfbMhgfWKQZOmTfj6tZgD3YcfX4JgX+2lBDPjyF+dxY7A RfxxOqWWIgKtQIu1jO8Or6NmgYPQWPF6oHE9+cK3dA== X-Received: by 10.157.91.47 with SMTP id x44mr10668027oth.187.1520254937660; Mon, 05 Mar 2018 05:02:17 -0800 (PST) MIME-Version: 1.0 Received: by 10.157.20.38 with HTTP; Mon, 5 Mar 2018 05:02:17 -0800 (PST) In-Reply-To: <6bbe9bf3-24c1-acd9-200d-513520d34558@lechnology.com> References: <1519071723-31790-1-git-send-email-david@lechnology.com> <1519071723-31790-11-git-send-email-david@lechnology.com> <93696fc8-bb93-aa20-3506-3d7216c17cd2@lechnology.com> <6bbe9bf3-24c1-acd9-200d-513520d34558@lechnology.com> From: Bartosz Golaszewski Date: Mon, 5 Mar 2018 14:02:17 +0100 Message-ID: Subject: Re: [PATCH v7 10/42] clk: davinci: New driver for davinci PSC clocks To: David Lechner Cc: Bartosz Golaszewski , linux-clk@vger.kernel.org, linux-devicetree , arm-soc , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Adam Ford , LKML Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2018-03-01 17:44 GMT+01:00 David Lechner : > On 03/01/2018 02:36 AM, Bartosz Golaszewski wrote: >> >> 2018-02-28 22:40 GMT+01:00 David Lechner : >>> >>> On 02/28/2018 06:38 AM, Bartosz Golaszewski wrote: >>>> >>>> >>>> >>>> I think I found the reason for the strange crashes we were >>>> experiencing (emac core->name being NULL) thanks to Sekhar who pointed >>>> me in the right direction. >>>> >>>> The mdio driver fails to probe with v7 due to the supplied clock rate >>>> being wrong. Before failing we register the emac clock with >>>> pm_clk_add_clk(). When clock_ops puts the clock, it decreases the >>>> reference count of the clock, but we never actually increased it in >>>> the first place in the line above. The core clock code then destroys >>>> the associated clk_core structure. When the next user comes around (in >>>> our case the clk debug functions) the system crashes. >>>> >>>> I believe there to be two issues: one is with v7 - we need to increase >>>> the clock reference count in davinci_psc_genpd_attach_dev(). >>>> >>>> Second is the error path in the clock framework - we should remove the >>>> destroyed clk_core from the debug list, which is not being done now. >>>> >>>> Why we even need to track the refcount of clk_core is a mistery for me >>>> though. Stephen, Mike? >>>> >>>> Best regards, >>>> Bartosz Golaszewski >>> >>> >>> >>> Great find. I figured it had to be something like this, but I wasn't >>> able to reproduce the problem yet. >>> >>> I suppose it is time to spin up a v8 with some fixes. >> >> >> I still don't know why the mdio clock rate is much lower than in >> mainline though. Any ideas? >> >> Thanks, >> Bart >> > > Now that you have fixed the crash, can you answer the questions I have > asked earlier? > >> Can you post the output of this command so that I can see how your > > clocks are setup: > > cat /sys/kernel/debug/clk/clk_summary > >> Using your workaround, can you run: > > > cat /sys/kernel/debug/pm_genpd/pm_genpd_summary > > If you see: > 1e27000.clock-controller: emac off-0 > > then genpd is not working like it is supposed to. You should see something > like this for device that are working: > 1e27000.clock-controller: uart2 on > /devices/platform/soc@1c00000/1d0d000.serial active Hi David, Sekhar, I tried booting the board today over tftp but didn't succeed. I then switched to a normal boot from SD card and the boot process froze at the same moment (right after the DHCP config, or after rtc config if I disabled DHCP in bootargs). I then realized that the emac clock can't be the culprit. After some digging I found out that the late_initcall to clk_disable_unused() disables sysclk6 - the parent of the arm clock, which of course freezes the device. If I remove the call to clk_disable_unused(), I can boot just fine. The following other clocks are disabled before pll0_sysclk6: pll1_sysclk3 pll0_obsclk pll0_sysclk7 davinci_lpsc_clk_enable() is never called for these clocks - in fact it's not called for any parent that's not explicitly defined in psc-da850.c - I believe this may be one of the reasons. I will get back to debugging it tomorrow. Best regards, Bartosz Golaszewski