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[209.132.180.67]) by mx.google.com with ESMTP id v4si8370244pgt.83.2018.03.05.06.17.45; Mon, 05 Mar 2018 06:17:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail (test mode) header.i=@8bytes.org header.s=mail-1 header.b=qPS0uSgH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935072AbeCENMe (ORCPT + 99 others); Mon, 5 Mar 2018 08:12:34 -0500 Received: from 8bytes.org ([81.169.241.247]:57344 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932084AbeCENMc (ORCPT ); Mon, 5 Mar 2018 08:12:32 -0500 Received: by theia.8bytes.org (Postfix, from userid 1000) id 6D0842A7; Mon, 5 Mar 2018 14:12:31 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=8bytes.org; s=mail-1; t=1520255551; bh=wjUle4lm5IG59Qb/QR3hlX3m+awpBJTiVzfU6I9V/PM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=qPS0uSgH0a7ooA6srYBTrCVW5HRmsX7AvyrS4iDKUyiNOnepYC06Rmk3hA7X+ZjfF ebNaYIBtHCxzZJO4ps8r/mCOFHJn5RCdtW1R3atblkfehTyNhR/v9FpHgDuz1f70pL klSqIXUVjooYlWlz6ER3P6zjV4jCywKcYhHc0hoHklZhRoogHo43xHejZAOzt9eKHd pntaKQNZdggRdELqMURWyrWHLK2X29U5N5FZSBwXMO5zlK0Mme0mTijqbf5XjQax/y Lx96zqBNHA9mz7rbaWiNbVvi0ktKnJQP5RqYb8csGl0GvqMjkRDIoPXBvZtE2Xzc+g v/wlA/kApcSFw== Date: Mon, 5 Mar 2018 14:12:31 +0100 From: Joerg Roedel To: Linus Torvalds Cc: Thomas Gleixner , Ingo Molnar , Peter Anvin , the arch/x86 maintainers , Linux Kernel Mailing List , linux-mm , Andrew Lutomirski , Dave Hansen , Josh Poimboeuf , =?iso-8859-1?Q?J=FCrgen_Gro=DF?= , Peter Zijlstra , Borislav Petkov , Jiri Kosina , Boris Ostrovsky , Brian Gerst , David Laight , Denys Vlasenko , Eduardo Valentin , Greg Kroah-Hartman , Will Deacon , "Liguori, Anthony" , Daniel Gruss , Hugh Dickins , Kees Cook , Andrea Arcangeli , Waiman Long , Pavel Machek , Joerg Roedel Subject: Re: [PATCH 07/34] x86/entry/32: Restore segments before int registers Message-ID: <20180305131231.GR16484@8bytes.org> References: <1520245563-8444-1-git-send-email-joro@8bytes.org> <1520245563-8444-8-git-send-email-joro@8bytes.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 05, 2018 at 04:17:45AM -0800, Linus Torvalds wrote: > Restoring the segments can cause exceptions that need to be > handled. With PTI enabled, we still need to be on kernel cr3 > when the exception happens. For the cr3-switch we need > at least one integer scratch register, so we can't switch > with the user integer registers already loaded. > > > This fundamentally seems wrong. Okay, right, with v3 it is wrong, in v2 I still thought I could get away without remembering the entry-cr3, but didn't think about the #DB case then. In v3 I added code which remembers the entry-cr3 and handles the entry-from-kernel-mode-with-user-cr3 case for all exceptions including #DB. > The things is, we *know* that we will restore two segment registers with the > user cr3 already loaded: CS and SS get restored with the final iret. Yeah, I know, but the iret-exception path is fine because it will deliver a SIGILL and doesn't return to the faulting iret. Anyway, I will remove these restore-reorderings, they are not needed anymore. > So has this been tested with > > ?- single-stepping through sysenter > > ? ?This takes a DB fault in the first kernel instruction. We're in kernel mode, > but with user cr3. > > ?- ptracing and setting CS/SS to something bad > > ? ?That should test the "exception on iret" case - again in kernel mode, but > with user cr3 restored for the return. The iret-exception case is tested by the ldt_gdt selftest (the do_multicpu_tests subtest). But I didn't actually tested single-stepping through sysenter yet. I just re-ran the same tests I did with v2 on this patch-set. Regards, Joerg