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[209.132.180.67]) by mx.google.com with ESMTP id 206si9560019pgb.408.2018.03.06.01.38.17; Tue, 06 Mar 2018 01:38:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=qN2l7jV2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753155AbeCFJhZ (ORCPT + 99 others); Tue, 6 Mar 2018 04:37:25 -0500 Received: from mail-qk0-f182.google.com ([209.85.220.182]:46011 "EHLO mail-qk0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750792AbeCFJhW (ORCPT ); Tue, 6 Mar 2018 04:37:22 -0500 Received: by mail-qk0-f182.google.com with SMTP id g2so24101626qkd.12; Tue, 06 Mar 2018 01:37:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=CTzX72L7kZrsFK1fCt/OruVbYH7IDEkWqKk4oN3Iq5g=; b=qN2l7jV2Or0auJSLsw3E+0xp6BDijzOrTYJJyZ75ozM+F6DdRajn76rwdNRGAydZrm U9L6PBxVb/EemJd+15nPnNR7Flu8s0uj6BasYQEXz9OdJPeGxPWGfRA29eEDQu3pcv6D dYIG78h7AaclYWiH7U/X0zt/6D96nQADY1cvv274qMmI8YkwHClbFzcGnl2wqD79RHne xOCXcjAfkoM8khJOtSdStS4v+hoWISNnmS4dikTXzX7abwXm7la4BfUz6sdRrs0FQV2b uwlqtmilc7Ms5MTH/iW7SxoT+iQ8HH2Fhk5UHlHBolRfQRbPXXZT8f5HiYrhMVV3B8QS 6Aeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=CTzX72L7kZrsFK1fCt/OruVbYH7IDEkWqKk4oN3Iq5g=; b=gOR//yrggarTP47gvRNnPaYZj3sY79afjqxHUh2xP2zWqqVCAF+aljJZ0BMdf367wW wm0InSnKmbce6UwzOlvFBRq991xnJwbN8sNR0vZQNFb17uhRqAGTlPhHlPixfe5CfJtp CBmpyl61jAy8Y6iESoiYa2c4sKc3TfPugka+uXONv1TCJKFGciWPFTbZ4zis9zXzJXMh D/jpt+PZ9pfMtxthN4dy9ogPFdua3r1za+QhQu37EH5EaW1n/SGqUqM9Fx3ecdXh8TsO ugnLnIGOvkY89TwPonH9YouWUOh+68xJ+ZizZ39WeeV1p6I/yAq5KNEANSC+qcOtlRUu LLJA== X-Gm-Message-State: AElRT7H34S/OdGtPeS8OK30g8hDROlutNPwfbCPxTh4dO3ihPfszUi1d GiiyAjKv2UbDZWFvFS4TgOa6tGPbV3ckenB/cIy5uYOT X-Received: by 10.55.0.203 with SMTP id t72mr19925749qkg.110.1520329041511; Tue, 06 Mar 2018 01:37:21 -0800 (PST) MIME-Version: 1.0 Received: by 10.12.195.80 with HTTP; Tue, 6 Mar 2018 01:37:21 -0800 (PST) In-Reply-To: <20180305231650.GA25693@fury> References: <20180227211539.5708-1-kernel@kempniu.pl> <20180227211539.5708-2-kernel@kempniu.pl> <20180304050813.GA3129@marvin.atrad.com.au> <20180304194426.GA1428@kmp-mobile.hq.kempniu.pl> <20180305231650.GA25693@fury> From: Andy Shevchenko Date: Tue, 6 Mar 2018 11:37:21 +0200 Message-ID: Subject: Re: [PATCH 1/7] platform/x86: fujitsu-laptop: Define constants for FUNC operations To: Darren Hart Cc: =?UTF-8?B?TWljaGHFgiBLxJlwaWXFhA==?= , Jonathan Woithe , Andy Shevchenko , Platform Driver , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 6, 2018 at 1:16 AM, Darren Hart wrote: > On Sun, Mar 04, 2018 at 08:44:26PM +0100, Micha=C5=82 K=C4=99pie=C5=84 wr= ote: >> > On Wed, Feb 28, 2018 at 06:08:52PM +0200, Andy Shevchenko wrote: >> > > On Tue, Feb 27, 2018 at 11:15 PM, Micha?? K??pie?? wrote: >> > > > Various functions exposed by the firmware through the FUNC interfa= ce >> > > > tend to use a consistent set of integers for denoting the type of >> > > > operation to be performed for a specified feature. Use named cons= tants >> > > > instead of integers in each call_fext_func() invocation in order t= o more >> > > > clearly convey the intent of each call. >> > > > >> > > > Note that FUNC_FLAGS is a bit peculiar: >> > > >> > > > +/* FUNC interface - operations */ >> > > > +#define OP_GET BIT(1) >> > > > +#define OP_GET_CAPS 0 >> > > > +#define OP_GET_EVENTS BIT(0) >> > > > +#define OP_GET_EXT BIT(2) >> > > > +#define OP_SET BIT(0) >> > > > +#define OP_SET_EXT (BIT(2) | BIT(0)) >> > > >> > > Hmm... this looks unordered a bit. >> > >> > It seems to be ordered alphabetically on the identifier. Andy, is it >> > preferred to order defines like this based on resolved numeric order? >> >> Just to expand on what Jonathan wrote above: if you take a peek at the >> end result of the patch series, you will notice a pattern: constants in >> each section are ordered alphabetically by their name. I wanted all >> sections to be consistently ordered. If you would rather have me order >> things by the bit index, sure, no problem, just please note that the >> order above is not accidental. > > Hrm. In my experience it is more typical to order by value (bit), that's = a > little less obvious when using the BIT()|BIT() macros though. So long as = it's > consistent, I think that's what matters most. What I'm trying to tell is about consistency of style. So, imagine if we have two bitfields in some register, one with one bit and the other with two. And for latter one only 3 states are possible (00, 10, 11), so, REG1_FLDA BIT(0) REG1_FLDB_STATE0 0 REG1_FLDB_STATE2 BIT(2) REG1_FLDB_STATE3 BIT(2) | BIT(3) // or 0x6, or (3 << 1) Above is not what I would like to see. The consistent may be one of the following REG1_FLDA BIT(0) REG1_FLDB_STATE0 (0 << 1) REG1_FLDB_STATE2 (2 << 1) REG1_FLDB_STATE3 (3 << 1) or (implying that in the code _SHIFT is used) REG1_FLDA BIT(0) REG1_FLDB_SHIFT 1 REG1_FLDB_STATE0 0 REG1_FLDB_STATE2 2 REG1_FLDB_STATE3 3 or (perhaps less wanted) REG1_FLDA (1 << 0) REG1_FLDB_STATE0 (0 << 1) REG1_FLDB_STATE2 (2 << 1) REG1_FLDB_STATE3 (3 << 1) --=20 With Best Regards, Andy Shevchenko