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Subject: Re: [PATCH v4 00/38] DRM Rockchip rk3399 (Kevin)
To:     Enric Balletbo i Serra <enric.balletbo@collabora.com>,
        architt@codeaurora.org, inki.dae@samsung.com,
        thierry.reding@gmail.com, hjc@rock-chips.com,
        seanpaul@chromium.org, airlied@linux.ie, tfiga@chromium.org,
        heiko@sntech.de
Cc:     hshi@chromium.org, wzz@rock-chips.com, hl@rock-chips.com,
        linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
        dianders@chromium.org, linux-rockchip@lists.infradead.org,
        orjan.eide@arm.com
From:   Marek Szyprowski <m.szyprowski@samsung.com>
Message-id: <568969f3-0b93-05ef-953d-af1eebdac87e@samsung.com>
Date:   Tue, 06 Mar 2018 11:15:52 +0100
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Hi Enric,

On 2018-03-05 23:22, Enric Balletbo i Serra wrote:
> Hi,
>
> This patchset includes cleanups, improvements, and bug fixes for
> Rockchip DRM driver and PSR support.
>
> This new version is the same as before but rebased on top of
> drm-misc-next plus the Marek patches that fixes Chromebook2 Peach-Pit [1]
> and the latest series of Rockchip rk3399 eDP support [2].
>
> [1] https://www.spinics.net/lists/dri-devel/msg167804.html
> [2] https://www.spinics.net/lists/dri-devel/msg167770.html

Thanks for v4 of this patchset.

After fixing the issue pointed in the patch 15/38, everything works fine on
Exynos5250-based Chromebook Snow and Exynos5420-based Chromebook2 Peach-Pit
boards. You can add my:

Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>

> Regards,
>   Enric
>
> Changes in v4:
> - Rebased all on top of drm-misc-next
> - Removed the following patches as are already applied.
>    [PATCH v3 01/43] drm/rockchip: Get rid of unnecessary struct fields
>    [PATCH v3 02/43] drm/rockchip: support prime import sg table
>    [PATCH v3 03/43] drm/rockchip: Respect page offset for PRIME mmap
>    calls
> - Removed the following patches as now are part of another patchset
>    [PATCH v3 05/43] drm/bridge: analogix_dp: Don't power bridge in
>    analogix_dp_bind
>    [PATCH v3 33/43] drm/panel: simple: Change mode for Sharp lq123p1jx31
>
> Changes in v3:
> - Addressed some of the comments from Sean on the v2
>
> Changes in v2:
> - A few patches have been replaced by newer and cleaner versions from
>    the ChromeOS kernel gerrit, especially about disallowing PSR for the
>    whole atomic commit.
>
>
> Douglas Anderson (4):
>    drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner
>    drm/bridge: analogix_dp: Properly log AUX CH errors
>    drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip
>    drm/bridge: analogix_dp: Split the platform-specific poweron in two
>      parts
>
> Kristian H. Kristensen (1):
>    drm/rockchip: Disable PSR on input events
>
> Lin Huang (6):
>    drm/bridge: analogix_dp: Move enable video into config_video()
>    drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer
>    drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the
>      panel
>    drm/bridge: analogix_dp: Extend hpd check time to 100ms
>    drm/bridge: analogix_dp: Check dpcd write/read status
>    drm/bridge: analogix_dp: Reset aux channel if an error occurred
>
> Mark Yao (1):
>    drm/rockchip: pre dither down when output bpc is 8bit
>
> Sean Paul (2):
>    drm/rockchip: Don't use atomic constructs for psr
>    drm/rockchip: Remove analogix psr worker
>
> Tomasz Figa (7):
>    drm/rockchip: analogix_dp: Do not call Analogix code before bind
>    drm/rockchip: Cancel PSR enable work before changing the state
>    drm/rockchip: psr: Avoid redundant calls to .set() callback
>    drm/rockchip: psr: Sanitize semantics of allow/disallow API
>    drm/rockchip: Disable PSR from reboot notifier
>    drm/rockchip: Disallow PSR for the whole atomic commit
>    drm/rockchip: psr: Remove flush by CRTC
>
> Yakir Yang (1):
>    drm/bridge: analogix_dp: detect Sink PSR state after configuring the
>      PSR
>
> zain wang (16):
>    drm/bridge: analogix_dp: set psr activate/deactivate when
>      enable/disable bridge
>    drm/bridge: analogix_dp: Don't change psr while bridge is disabled
>    drm/rockchip: add mutex vop lock
>    drm/bridge: analogix_dp: add fast link train for eDP
>    drm/rockchip: Only wait for panel ACK on PSR entry
>    drm/bridge: analogix_dp: Don't use fast link training when panel just
>      powered up
>    drm/bridge: analogix_dp: Retry bridge enable when it failed
>    drm/bridge: analogix_dp: Wait for HPD signal before configuring link
>    drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy
>    drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode
>    drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip
>    drm/rockchip: Restore psr->state when enable/disable psr failed
>    drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll
>    drm/bridge: analogix_dp: Fix timeout of video streamclk config
>    drm/bridge: analogix_dp: Fix incorrect operations with register
>      ANALOGIX_DP_FUNC_EN_1
>    drm/bridge: analogix_dp: Move fast link training detect to set_bridge
>
>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 452 ++++++++++++++++-----
>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  14 +-
>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 274 ++++++++-----
>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h  |   7 +
>   drivers/gpu/drm/exynos/exynos_dp.c                 |   2 +-
>   drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    |  73 ++--
>   drivers/gpu/drm/rockchip/rockchip_drm_drv.c        |   2 +-
>   drivers/gpu/drm/rockchip/rockchip_drm_drv.h        |   3 +-
>   drivers/gpu/drm/rockchip/rockchip_drm_fb.c         |  61 ++-
>   drivers/gpu/drm/rockchip/rockchip_drm_psr.c        | 361 ++++++++++------
>   drivers/gpu/drm/rockchip/rockchip_drm_psr.h        |   7 +-
>   drivers/gpu/drm/rockchip/rockchip_drm_vop.c        |  47 ++-
>   drivers/gpu/drm/rockchip/rockchip_drm_vop.h        |   1 +
>   drivers/gpu/drm/rockchip/rockchip_vop_reg.c        |   1 +
>   include/drm/bridge/analogix_dp.h                   |   5 +-
>   15 files changed, 915 insertions(+), 395 deletions(-)
>

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland